kernel/include/linux/spi/spi.h, branch master

treewide: Replace kmalloc with kmalloc_obj for non-scalar types

2026-02-21T09:02:28Z

This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook

Merge tag 'sound-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

2026-02-11T19:43:00Z

Pull sound updates from Takashi Iwai: "It's been relatively calm for a new era; majority of changes are for ASoC, mostly device-specific changes, while there are a bit of cleanups in core stuff. A few SPI API and regmap updates are included to be used by sound drivers, too. Core: - A few trivial cleanups about __free() and runtime PM macros - Convert to new snd_seq_bus binding ASoC: - Generic SDCA support for reporting jack events - Continuing platform support, cleanup and feature improvements for AMD, Intel, Qualcomm and SOF code - Platform description improvements for the Cirrus drivers - Support for NXP i.MX952, Realtek RT1320 and RT5575, and Sophogo CV1800B HD- and USB-audio: - Many quirks as usual" * tag 'sound-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (341 commits) ALSA: usb-audio: Add DSD support for iBasso DC04U ALSA: mixer: oss: Add card disconnect checkpoints ASoC: SOF: ipc4-control: Set correct error code in refresh_bytes_control ASoC: SOF: Intel: select CONFIG_SND_HDA_EXT_CORE from SND_SOC_SOF_HDA_COMMON ALSA: usb-audio: Add iface reset and delay quirk for AB13X USB Audio ASoC: amd: maintainer information ALSA: ctxfi: Add quirk for SE-300PCIE variant (160b:0102) ALSA: hda/generic: fix typos in comments ALSA: hda/realtek - Enable mute LEDs on HP ENVY x360 15-es0xxx ALSA: hda/conexant: Add quirk for HP ZBook Studio G4 ASoC: fsl_asrc_dma: allocate memory from dma device ASoC: fsl_asrc: Add support for i.MX952 platform ASoC: fsl_asrc_m2m: Add option to start ASRC before DMA device for M2M ASoC: dt-bindings: fsl,imx-asrc: Add support for i.MX952 platform ALSA: oss: delete self assignment ASoC: rockchip: spdif: Convert to FIELD_PREP ASoC: rockchip: spdif: Fill IEC958 CS info per params ASoC: rockchip: spdif: Add support for format S32_LE ASoC: rockchip: spdif: Add support for set mclk rate ASoC: rockchip: spdif: Swap PCM and DAI component registration order ...

spi: add multi_lane_mode field to struct spi_transfer

2026-02-02T12:12:44Z

Add a new multi_lane_mode field to struct spi_transfer to allow peripherals that support multiple SPI lanes to be used with a single SPI controller. This requires both the peripheral and the controller to have multiple serializers connected to separate data lanes. It could also be used with a single controller and multiple peripherals that are functioning as a single logical device (similar to parallel memories). Acked-by: Nuno Sá Acked-by: Marcelo Schmitt Reviewed-by: Jonathan Cameron Signed-off-by: David Lechner Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-4-12af183c06eb@baylibre.com Signed-off-by: Mark Brown

spi: support controllers with multiple data lanes

2026-02-02T12:12:43Z

Add support for SPI controllers with multiple physical SPI data lanes. (A data lane in this context means lines connected to a serializer, so a controller with two data lanes would have two serializers in a single controller). This is common in the type of controller that can be used with parallel flash memories, but can be used for general purpose SPI as well. To indicate support, a controller just needs to set ctlr->num_data_lanes to something greater than 1. Peripherals indicate which lane they are connected to via device tree (ACPI support can be added if needed). The spi-{tx,rx}-bus-width DT properties can now be arrays. The length of the array indicates the number of data lanes, and each element indicates the bus width of that lane. For now, we restrict all lanes to have the same bus width to keep things simple. Support for an optional controller lane mapping property is also implemented. Signed-off-by: David Lechner Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-3-12af183c06eb@baylibre.com Signed-off-by: Mark Brown

spi: change of_find_spi_controller_by_node() gating to CONFIG_OF

2026-01-05T13:18:50Z

Currently, the helper of_find_spi_controller_by_node() is gated under CONFIG_OF_DYNAMIC. This prevents drivers from using it in all CONFIG_OF configurations. This patch moves the gating to CONFIG_OF, keeping the inline fallback returning NULL when Device Tree support is disabled. Signed-off-by: Oder Chiou Link: https://patch.msgid.link/6d8ae977d9f4726ea23ad5382638750593f9a2e4.1767148150.git.oder_chiou@realtek.com Signed-off-by: Mark Brown

spi: export of_find_spi_controller_by_node()

2026-01-05T13:18:49Z

Some devices are primarily described on another bus (e.g. I2C) but also have an additional SPI connection that serves as a transport for firmware loading. Export of_find_spi_controller_by_node() so drivers can obtain the SPI controller referenced by a DT phandle. Signed-off-by: Oder Chiou Reviewed-by: Cezary Rojewski Link: https://patch.msgid.link/0e572a00aa305e588357162d400ba9472ce56dd3.1767148150.git.oder_chiou@realtek.com Signed-off-by: Mark Brown

spi: rename SPI_CS_CNT_MAX => SPI_DEVICE_CS_CNT_MAX

2025-09-22T08:29:45Z

Rename SPI_CS_CNT_MAX to SPI_DEVICE_CS_CNT_MAX to make it more obvious that this is the max number of CS per device supported, not per controller. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-8-jonas.gorski@gmail.com Signed-off-by: Mark Brown

spi: reduce device chip select limit again

2025-09-22T08:29:44Z

The spi chipselect limit SPI_CS_CNT_MAX was raised with commit 2f8c7c3715f2 ("spi: Raise limit on number of chip selects") from 4 to 16 to accommodate spi controllers with more than 4 chip selects, and then later to 24 with commit 96893cdd4760 ("spi: Raise limit on number of chip selects to 24"). Now that we removed SPI_CS_CNT_MAX limiting the chip selects of controllers, we can reduce the amount of chip selects per device again to 4, the original value. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-7-jonas.gorski@gmail.com Signed-off-by: Mark Brown

spi: keep track of number of chipselects in spi_device

2025-09-22T08:29:41Z

There are several places where we need to iterate over a device's chipselect. To be able to do it efficiently, store the number of chipselects in spi_device, like we do for controllers. Since we now use a device supplied value, add a check to make sure it isn't more than we can support. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-3-jonas.gorski@gmail.com Signed-off-by: Mark Brown

spi: Raise limit on number of chip selects to 24

2025-06-29T21:10:52Z

We have a system which uses 24 SPI chip selects, raise the hard coded limit accordingly. Signed-off-by: Marc Kleine-Budde Link: https://patch.msgid.link/20250629-spi-increase-number-of-cs-v2-1-85a0a09bab32@pengutronix.de Signed-off-by: Mark Brown