<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/spi/spi-mem.h, branch linux-6.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.5.y</id>
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<updated>2023-07-27T14:54:22Z</updated>
<entry>
<title>mtd: spi-nor: avoid holes in struct spi_mem_op</title>
<updated>2023-07-27T14:54:22Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-07-19T19:00:25Z</published>
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<id>urn:sha1:71c8f9cf2623d0db79665f876b95afcdd8214aec</id>
<content type='text'>
gcc gets confused when -ftrivial-auto-var-init=pattern is used on sparse
bit fields such as 'struct spi_mem_op', which caused the previous false
positive warning about an uninitialized variable:

drivers/mtd/spi-nor/spansion.c: error: 'op' is used uninitialized [-Werror=uninitialized]

In fact, the variable is fully initialized and gcc does not see it being
used, so the warning is entirely bogus. The problem appears to be
a misoptimization in the initialization of single bit fields when the
rest of the bytes are not initialized.

A previous workaround added another initialization, which ended up
shutting up the warning in spansion.c, though it apparently still happens
in other files as reported by Peter Foley in the gcc bugzilla. The
workaround of adding a fake initialization seems particularly bad
because it would set values that can never be correct but prevent the
compiler from warning about actually missing initializations.

Revert the broken workaround and instead pad the structure to only
have bitfields that add up to full bytes, which should avoid this
behavior in all drivers.

I also filed a new bug against gcc with what I found, so this can
hopefully be addressed in future gcc releases. At the moment, only
gcc-12 and gcc-13 are affected.

Cc: Peter Foley &lt;pefoley2@pefoley.com&gt;
Cc: Pedro Falcato &lt;pedro.falcato@gmail.com&gt;
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110743
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108402
Link: https://godbolt.org/z/efMMsG1Kx
Fixes: 420c4495b5e56 ("mtd: spi-nor: spansion: make sure local struct does not contain garbage")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20230719190045.4007391-1-arnd@kernel.org
</content>
</entry>
<entry>
<title>spi: spi-mem: Fix typo (of -&gt; or)</title>
<updated>2022-10-10T12:01:19Z</updated>
<author>
<name>Jonathan Neuschäfer</name>
<email>j.neuschaefer@gmx.net</email>
</author>
<published>2022-10-08T15:14:59Z</published>
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<id>urn:sha1:b994d8f0773cf3b01129c094d00050710f2c422b</id>
<content type='text'>
In this instance, "or" makes more sense than "of", so I guess that "or"
was intended and "of" was a typo.

Signed-off-by: Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;
Link: https://lore.kernel.org/r/20221008151459.1421406-1-j.neuschaefer@gmx.net
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: Add an ecc parameter to the spi_mem_op structure</title>
<updated>2022-02-10T08:32:30Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2022-01-27T09:18:01Z</published>
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<id>urn:sha1:a433c2cbd75ab76f277364f44e76f32c7df306e7</id>
<content type='text'>
Soon the SPI-NAND core will need a way to request a SPI controller to
enable ECC support for a given operation. This is because of the
pipelined integration of certain ECC engines, which are directly managed
by the SPI controller itself.

Introduce a spi_mem_op additional field for this purpose: ecc.

So far this field is left unset and checked to be false by all
the SPI controller drivers in their -&gt;supports_op() hook, as they all
call spi_mem_default_supports_op().

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-7-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper</title>
<updated>2022-02-10T08:32:30Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2022-01-27T09:18:00Z</published>
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<id>urn:sha1:9a15efc5d5e6b5beaed0883e5bdcd0b1384c1b20</id>
<content type='text'>
Now that spi_mem_default_supports_op() has access to the static
controller capabilities (relating to memory operations), and now that
these capabilities have been filled by the relevant controllers, there
is no need for a specific helper checking only DTR operations, so let's
just kill spi_mem_dtr_supports_op() and simply use
spi_mem_default_supports_op() instead.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-6-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>spi: spi-mem: Introduce a capability structure</title>
<updated>2022-02-10T08:32:29Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2022-01-27T09:17:56Z</published>
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<id>urn:sha1:4a3cc7fb6e63bcfdedec25364738f1493345bd20</id>
<content type='text'>
Create a spi_controller_mem_caps structure and put it within the
spi_controller structure close to the spi_controller_mem_ops
strucure. So far the only field in this structure is the support for dtr
operations, but soon we will add another parameter.

Also create a helper to parse the capabilities and check if the
requested capability has been set or not.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-2-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>spi: spi-mem: add automatic poll status functions</title>
<updated>2021-06-03T13:04:56Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@foss.st.com</email>
</author>
<published>2021-05-18T16:27:52Z</published>
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<id>urn:sha1:c955a0cc8a286e5da1ebb88c19201e9bab8c2422</id>
<content type='text'>
With STM32 QSPI, it is possible to poll the status register of the device.
This could be done to offload the CPU during an operation (erase or
program a SPI NAND for example).

spi_mem_poll_status API has been added to handle this feature.
This new function take care of the offload/non-offload cases.

For the non-offload case, use read_poll_timeout() to poll the status in
order to release CPU during this phase.
For example, previously, when erasing large area, in non-offload case,
CPU load can reach ~50%, now it decrease to ~35%.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Signed-off-by: Christophe Kerello &lt;christophe.kerello@foss.st.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/r/20210518162754.15940-2-patrice.chotard@foss.st.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: add spi_mem_dtr_supports_op()</title>
<updated>2021-02-11T15:51:36Z</updated>
<author>
<name>Pratyush Yadav</name>
<email>p.yadav@ti.com</email>
</author>
<published>2021-02-04T14:12:17Z</published>
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<id>urn:sha1:539cf68cd51bfcd2987ce1c44e628e9da69de7c8</id>
<content type='text'>
spi_mem_default_supports_op() rejects DTR ops by default to ensure that
the controller drivers that haven't been updated with DTR support
continue to reject them. It also makes sure that controllers that don't
support DTR mode at all (which is most of them at the moment) also
reject them.

This means that controller drivers that want to support DTR mode can't
use spi_mem_default_supports_op(). Driver authors have to roll their own
supports_op() function and mimic the buswidth checks. See
spi-cadence-quadspi.c for example. Or even worse, driver authors might
skip it completely or get it wrong.

Add spi_mem_dtr_supports_op(). It provides a basic sanity check for DTR
ops and performs the buswidth requirement check. Move the logic for
checking buswidth in spi_mem_default_supports_op() to a separate
function so the logic is not repeated twice.

Signed-off-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20210204141218.32229-1-p.yadav@ti.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: allow specifying a command's extension</title>
<updated>2020-07-14T16:29:38Z</updated>
<author>
<name>Pratyush Yadav</name>
<email>p.yadav@ti.com</email>
</author>
<published>2020-06-23T18:30:15Z</published>
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<id>urn:sha1:caf72df48be32c39f74287976ae843501ae06949</id>
<content type='text'>
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
inverse of the opcode. When it is "hex" an additional opcode byte based
is sent with the command whose value can be anything.

So, make opcode a 16-bit value and add a 'nbytes', similar to how
multiple address widths are handled.

Some places use sizeof(op-&gt;cmd.opcode). Replace them with op-&gt;cmd.nbytes

The spi-mxic and spi-zynq-qspi drivers directly use op-&gt;cmd.opcode as a
buffer. Now that opcode is a 2-byte field, this can result in different
behaviour depending on if the machine is little endian or big endian.
Extract the opcode in a local 1-byte variable and use that as the buffer
instead. Both these drivers would reject multi-byte opcodes in their
supports_op() hook anyway, so we only need to worry about single-byte
opcodes for now.

The above two changes are put in this commit to keep the series
bisectable.

Signed-off-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Link: https://lore.kernel.org/r/20200623183030.26591-3-p.yadav@ti.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: allow specifying whether an op is DTR or not</title>
<updated>2020-07-14T16:29:37Z</updated>
<author>
<name>Pratyush Yadav</name>
<email>p.yadav@ti.com</email>
</author>
<published>2020-06-23T18:30:14Z</published>
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<id>urn:sha1:4c5e2bba30e49b970a0fd07b43e0b7a3b5fd5ea7</id>
<content type='text'>
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.

Signed-off-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Link: https://lore.kernel.org/r/20200623183030.26591-2-p.yadav@ti.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: Make spi_mem_default_supports_op() static inline</title>
<updated>2019-05-02T01:37:46Z</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-04-10T13:18:28Z</published>
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<id>urn:sha1:b5881b153bc81d63a5a7e82a35e8a4bdbe1f8c73</id>
<content type='text'>
Stub helper spi_mem_default_supports_op() should
be set to static inline

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
