kernel/include/linux/omap-gpmc.h, branch linux-4.15.y

memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()

2017-11-03T13:06:11Z

Deprecated gpmc_update_nand_reg() is no longer used, remove. Signed-off-by: Ladislav Michl Signed-off-by: Roger Quadros

ARM: OMAP2+: Remove legacy gpmc-nand.c

2017-02-28T17:08:33Z

This code is no longer used and can be removed as we are using device tree. Removing this code also removes a dependency between drivers/mtd and arch/arm/mach-omap2 making furhter driver changes easier. Signed-off-by: Ladislav Michl [tony@atomide.com: removed from header too, updated comments] Signed-off-by: Tony Lindgren

ARM: OMAP2+: gpmc-onenand: propagate error on initialization failure

2017-02-28T17:06:23Z

gpmc_probe_onenand_child returns success even on gpmc_onenand_init failure. Fix that. Signed-off-by: Ladislav Michl Acked-by: Roger Quadros Signed-off-by: Tony Lindgren

memory: omap-gpmc: Fix build with CONFIG_OMAP_GPMC disabled

2016-08-29T08:00:23Z

Fix the following build failure if omap-gpmc.h is used with CONFIG_OMAP_GPMC disabled. ./include/linux/omap-gpmc.h:32:1: error: unknown type name ‘gpmc_nand_ops’ Signed-off-by: Roger Quadros

memory: omap-gpmc: Implement IRQ domain for NAND IRQs

2016-04-15T08:52:28Z

GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount. Use IRQ domain for this. NAND device tree node can then get the necessary interrupts by using gpmc as the interrupt parent. Legacy boot uses gpmc_get_client_irq to get the NAND interrupts from the GPMC IRQ domain. Get rid of custom bitmasks and use IRQ domain for that as well. Signed-off-by: Roger Quadros Acked-by: Rob Herring Acked-by: Tony Lindgren

memory: omap-gpmc: Introduce GPMC to NAND interface

2016-04-15T08:51:34Z

The OMAP GPMC module has certain registers dedicated for NAND access and some NAND bits mixed with other GPMC functionality. For the NAND dedicated registers we have the struct gpmc_nand_regs. The NAND driver needs to access NAND specific bits from the following non-dedicated registers - EMPTYWRITEBUFFERSTATUS from GPMC_STATUS For accessing these bits we introduce the struct gpmc_nand_ops. Add gpmc_omap_get_nand_ops() that returns the gpmc_nand_ops along with updating the gpmc_nand_regs. This API will be called by the OMAP NAND driver to access the necessary bits in GPMC register space. Signed-off-by: Roger Quadros Acked-by: Tony Lindgren

ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data

2016-04-15T08:51:02Z

Add device_timings, gpmc_timings and gpmc_setting to gpmc platform data. Signed-off-by: Roger Quadros Acked-by: Tony Lindgren

ARM: OMAP2+: gpmc: Add platform data

2016-04-15T08:50:44Z

Add a platform data structure for GPMC. It contains all the necessary platform information that needs to be passed from platform init code to GPMC driver. Signed-off-by: Roger Quadros Acked-by: Tony Lindgren

memory: omap-gpmc: Add support for AAD timings

2016-02-08T14:22:03Z

In order to support extended timings parameters on hardware supporting the "AAD" mode like the AM335x or DM816x, add these entries into the GPMC driver if the hardware is capable. Tested on DM816x and AM335x. Signed-off-by: Neil Armstrong Acked-by: Tony Lindgren Signed-off-by: Roger Quadros

ARM OMAP2+ GPMC: calculate GPMCFCLKDIVIDER based on WAITMONITORINGTIME

2015-03-06T10:39:48Z

The WAITMONITORINGTIME is expressed as a number of GPMC_CLK clock cycles, even though the access is defined as asynchronous, and no GPMC_CLK clock is provided to the external device. Still, GPMCFCLKDIVIDER is used as a divider for the GPMC clock, so it must be programmed to define the correct WAITMONITORINGTIME delay. Calculate GPMCFCLKDIVIDER independent of gpmc,sync-clk-ps in DT for pure asynchronous accesses, i.e. both read and write asynchronous. Signed-off-by: Robert ABEL Acked-by: Tony Lindgren Signed-off-by: Roger Quadros