<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/mtd/spi-nor.h, branch linux-4.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2017-10-10T16:19:42Z</updated>
<entry>
<title>mtd: spi-nor: add spi_nor_init() function</title>
<updated>2017-10-10T16:19:42Z</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2017-08-22T20:45:21Z</published>
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<id>urn:sha1:46dde01f6bab35d99af111fcc02ca3ee1146050f</id>
<content type='text'>
This patch extracts some chunks from spi_nor_init_params and spi_nor_scan()
 and moves them into a new spi_nor_init() function.

Indeed, spi_nor_init() regroups all the required SPI flash commands to be
sent to the SPI flash memory before performing any runtime operations
(Fast Read, Page Program, Sector Erase, ...). Hence spi_nor_init():
1) removes the flash protection if applicable for certain vendors.
2) sets the Quad Enable bit, if needed, before using Quad SPI protocols.
3) makes the memory enter its (stateful) 4-byte address mode, if needed,
   for SPI flash memory &gt; 128Mbits not supporting the 4-byte address
   instruction set.

spi_nor_scan() now ends by calling spi_nor_init() once the probe phase has
completed. Further patches could also use spi_nor_init() to implement the
mtd-&gt;_resume() handler for the spi-nor framework.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@wedev4u.fr&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Recover from Spansion/Cypress errors</title>
<updated>2017-08-01T19:15:33Z</updated>
<author>
<name>Alexander Sverdlin</name>
<email>alexander.sverdlin@nokia.com</email>
</author>
<published>2017-07-17T15:54:07Z</published>
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<id>urn:sha1:c4b3eacc1dfef5f36dbdf9a99be37834d3e23ed0</id>
<content type='text'>
S25FL{128|256|512}S datasheets say:
"When P_ERR or E_ERR bits are set to one, the WIP bit will remain set to
one indicating the device remains busy and unable to receive new operation
commands. A Clear Status Register (CLSR) command must be received to return
the device to standby mode."

Current spi-nor code works until first error occurs, but write/erase errors
are not just rare hardware failures, they also occur if user tries to flash
write-protected areas. After such attempt no SPI command can be executed
any more and even read fails. This patch adds support for P_ERR and E_ERR
bits in Status Register 1 (so that operation fails immediately and not
after a long timeout) and proper recovery from the error condition.

Tested on Spansion S25FS128S, which is supported by S25FL129P entry.

Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@nokia.com&gt;
Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@wedev4u.fr&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables</title>
<updated>2017-07-18T12:37:18Z</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@microchip.com</email>
</author>
<published>2017-06-26T13:10:00Z</published>
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<id>urn:sha1:f384b352cbf0310fd20c379c4710408c70e769b6</id>
<content type='text'>
This patch adds support to the JESD216 rev B standard and parses the SFDP
tables to dynamically initialize the 'struct spi_nor_flash_parameter'.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@microchip.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: introduce Octo SPI protocols</title>
<updated>2017-05-15T19:56:17Z</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@atmel.com</email>
</author>
<published>2017-04-25T20:08:49Z</published>
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<id>urn:sha1:fe488a5e48c69204c3b1ad6fa3282e12dbfaabe7</id>
<content type='text'>
This patch starts adding support to Octo SPI protocols (SPI x-y-8).

Op codes for Fast Read and/or Page Program operations using Octo SPI
protocols are not known yet (no JEDEC specification has defined them yet)
but we'd rather introduce the Octo SPI protocols now so it's done as it
should be.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocols</title>
<updated>2017-05-15T19:56:17Z</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@atmel.com</email>
</author>
<published>2017-04-25T20:08:48Z</published>
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<id>urn:sha1:15f55331527b1422eae683477f8a31fdfae93316</id>
<content type='text'>
This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
DTR is used only for Fast Read operations.

According to manufacturer datasheets, whatever the number of I/O lines
used during instruction (x) and address/mode/dummy (y) clock cycles, DTR
is used only during data (z) clock cycles of SPI x-y-z protocols.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols</title>
<updated>2017-05-15T19:56:17Z</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@atmel.com</email>
</author>
<published>2017-04-25T20:08:46Z</published>
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<id>urn:sha1:cfc5604c488ccd17936b69008af0c9ae050f4a08</id>
<content type='text'>
This patch changes the prototype of spi_nor_scan(): its 3rd parameter
is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
framework about the actual hardware capabilities supported by the SPI
controller and its driver.

Besides, this patch also introduces a new 'struct spi_nor_flash_parameter'
telling the spi-nor framework about the hardware capabilities supported by
the SPI flash memory and the associated settings required to use those
hardware caps.

Then, to improve the readability of spi_nor_scan(), the discovery of the
memory settings and the memory initialization are now split into two
dedicated functions.

1 - spi_nor_init_params()

The spi_nor_init_params() function is responsible for initializing the
'struct spi_nor_flash_parameter'. Currently this structure is filled with
legacy values but further patches will allow to override some parameter
values dynamically, for instance by reading the JESD216 Serial Flash
Discoverable Parameter (SFDP) tables from the SPI memory.
The spi_nor_init_params() function only deals with the hardware
capabilities of the SPI flash memory: especially it doesn't care about
the hardware capabilities supported by the SPI controller.

2 - spi_nor_setup()

The second function is called once the 'struct spi_nor_flash_parameter'
has been initialized by spi_nor_init_params().
With both 'struct spi_nor_flash_parameter' and 'struct spi_nor_hwcaps',
the new argument of spi_nor_scan(), spi_nor_setup() computes the best
match between hardware caps supported by both the (Q)SPI memory and
controller hence selecting the relevant settings for (Fast) Read and Page
Program operations.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes</title>
<updated>2017-02-10T12:55:03Z</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@atmel.com</email>
</author>
<published>2016-10-27T09:55:39Z</published>
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<id>urn:sha1:902cc69a0820252c84c6f7caed350882cea166ba</id>
<content type='text'>
This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Add support for S3AN spi-nor devices</title>
<updated>2017-02-10T12:54:16Z</updated>
<author>
<name>Ricardo Ribalda</name>
<email>ricardo.ribalda@gmail.com</email>
</author>
<published>2016-12-02T11:31:44Z</published>
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<id>urn:sha1:e99ca98f1d7190c16601b00d0c96212d7c00577d</id>
<content type='text'>
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.

The protocol of this flash follows most of the spi-nor standard. With
the following differences:

- Page size might not be a power of two.
- The address calculation (default addressing mode).
- The spi nor commands used.

Protocol is described on Xilinx User Guide UG333

Signed-off-by: Ricardo Ribalda Delgado &lt;ricardo.ribalda@gmail.com&gt;
Cc: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Cc: Brian Norris &lt;computersforpeace@gmail.com&gt;
Cc: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: stop passing around retlen</title>
<updated>2016-06-02T00:22:52Z</updated>
<author>
<name>Michal Suchanek</name>
<email>hramrach@gmail.com</email>
</author>
<published>2016-05-06T00:31:53Z</published>
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<id>urn:sha1:2dd087b16946cf168f401526adf26afa771bb740</id>
<content type='text'>
Do not pass retlen to hardware driver read/write functions. Update it in
spi-nor generic driver instead.

Signed-off-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Tested-by Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Acked-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
Tested-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: change return value of read/write</title>
<updated>2016-06-02T00:22:28Z</updated>
<author>
<name>Michal Suchanek</name>
<email>hramrach@gmail.com</email>
</author>
<published>2016-05-06T00:31:47Z</published>
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<id>urn:sha1:59451e1233bd315c5379a631838a03d80e689581</id>
<content type='text'>
Change the return value of spi-nor device read and write methods to
allow returning amount of data transferred and errors as
read(2)/write(2) does.

Also, start handling positive returns in spi_nor_read(), since we want
to convert drivers to start returning the read-length both via *retlen
and the return code. (We don't need to do the same transition process
for spi_nor_write(), since -&gt;write() didn't used to have a return code
at all.)

Signed-off-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Tested-by Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Acked-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
Tested-by: Michal Suchanek &lt;hramrach@gmail.com&gt;
</content>
</entry>
</feed>
