<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/mtd/rawnand.h, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y'/>
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<updated>2020-12-10T21:37:31Z</updated>
<entry>
<title>mtd: rawnand: fix a kernel-doc markup</title>
<updated>2020-12-10T21:37:31Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab+huawei@kernel.org</email>
</author>
<published>2020-10-23T16:33:04Z</published>
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<id>urn:sha1:7998d89875177a5fac9f963e230dbb828c218cb9</id>
<content type='text'>
Some identifiers have different names between their prototypes
and the kernel-doc markup.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/9ed47a57d12c40e73a9b01612ee119d39baa6236.1603469755.git.mchehab+huawei@kernel.org
</content>
</entry>
<entry>
<title>mtd: nand: ecc-hamming: Stop using raw NAND structures</title>
<updated>2020-12-10T21:37:29Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-09-29T23:01:20Z</published>
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<id>urn:sha1:19b2ce184b9f404d6620adf667a9019e6abcae51</id>
<content type='text'>
This code is meant to be reused by the SPI-NAND core. Now that the
driver has been cleaned and reorganized, use a generic ECC engine
object to store the driver's data instead of accessing members of the
nand_chip structure. This means adding proper init/cleanup helpers.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-17-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: nand: ecc-hamming: Rename the exported functions</title>
<updated>2020-12-10T21:37:29Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-09-29T23:01:19Z</published>
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<id>urn:sha1:90ccf0a0192f7fa06e52de80cb528c5217e3e297</id>
<content type='text'>
Prefix by ecc_sw_hamming_ the functions which should be internal only
but are exported for "raw" operations.

Prefix by nand_ecc_sw_hamming_ the other functions which will be used
in the context of the declaration of an Hamming proper ECC engine
object.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-16-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Get rid of chip-&gt;ecc.priv</title>
<updated>2020-12-10T21:37:29Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-09-29T23:01:14Z</published>
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<id>urn:sha1:cbd87780bed580b585d2992f29077ac44950cb66</id>
<content type='text'>
nand_ecc_ctrl embeds a private pointer which only has a meaning in the
sunxi driver. This structure will soon be deprecated, but as this
field is actually not needed, let's just drop it.

Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Maxime Ripard &lt;mripard@kernel.org&gt;
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-11-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: nand: ecc-bch: Update the prototypes to be more generic</title>
<updated>2020-11-30T08:27:33Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-09-29T23:01:11Z</published>
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<id>urn:sha1:ea146d7fbf5081b5eb2777df5e30ed70ca68985b</id>
<content type='text'>
These functions must be usable by the main NAND core, so their names
must be technology-agnostic as well as the parameters. Hence, we pass
a generic nand_device instead of a raw nand_chip structure.

As it seems that changing the raw NAND functions to always pass a
generic NAND device is a lost of time, we prefer to create dedicated
raw NAND wrappers that will be useful in the near future to do the
translation.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-8-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the NAND framework user_conf object for ECC flags</title>
<updated>2020-09-30T14:44:15Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:08Z</published>
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<id>urn:sha1:b5156335ac37f186812090795ed27884a76c3266</id>
<content type='text'>
Instead of storing the ECC flags in chip-&gt;ecc.options, use
nanddev-&gt;ecc.user_conf.flags.

There is currently only one to save: NAND_ECC_MAXIMIZE.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the ECC framework user input parsing bits</title>
<updated>2020-09-30T14:44:15Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:07Z</published>
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<id>urn:sha1:d7157ff49a5b5845b37b8f2bf31607f0af295ef1</id>
<content type='text'>
Many helpers are generic to all NAND chips, they should not be
raw-NAND specific, so use the generic ones.

To avoid moving all the raw NAND core "history" into the generic NAND
layer, we keep a part of this parsing in the raw NAND core to ensure
backward compatibility.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-20-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the ECC framework OOB layouts</title>
<updated>2020-09-30T14:43:52Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:05Z</published>
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<id>urn:sha1:1e3b37aab958861a9d0c01ff6dbec96a82743701</id>
<content type='text'>
No need to have our own in the raw NAND core.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-18-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the new ECC engine type enumeration</title>
<updated>2020-09-28T13:59:42Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:58Z</published>
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<id>urn:sha1:bace41f80f65dc4ba13c892bac783e7e81847379</id>
<content type='text'>
Mechanical switch from the legacy "mode" enumeration to the new
"engine type" enumeration in drivers and board files.

The device tree parsing is also updated to return the new enumeration
from the old strings.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Separate the ECC engine type and the ECC byte placement</title>
<updated>2020-09-28T13:56:34Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:57Z</published>
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<id>urn:sha1:ef24f97daac4d9450c956ab165d8337c2feca0e9</id>
<content type='text'>
The use of "syndrome" placement should not be encoded in the ECC
engine mode/type.

Create a "placement" field in NAND chip and change all occurrences of
the NAND_ECC_HW_SYNDROME enumeration to be just NAND_ECC_HW and
possibly a placement entry like NAND_ECC_PLACEMENT_INTERLEAVED.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-10-miquel.raynal@bootlin.com
</content>
</entry>
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