<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/mtd/rawnand.h, branch linux-5.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.10.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.10.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2022-08-21T13:16:16Z</updated>
<entry>
<title>mtd: rawnand: Add NV-DDR timings</title>
<updated>2022-08-21T13:16:16Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d4f7bcce90023eeca5cbbbd72dafa2e49ed5bf16'/>
<id>urn:sha1:d4f7bcce90023eeca5cbbbd72dafa2e49ed5bf16</id>
<content type='text'>
[ Upstream commit 1666b815ad1a5b6373e950da5002ac46521a9b28 ]

Create the relevant ONFI NV-DDR timings structure and fill it with
default values from the ONFI specification.

Add the relevant structure entries and helpers.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-9-miquel.raynal@bootlin.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: Add a helper to clarify the interface configuration</title>
<updated>2022-08-21T13:16:16Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:29Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c91e5215a4136c33fde9b9688643dbac72139d9b'/>
<id>urn:sha1:c91e5215a4136c33fde9b9688643dbac72139d9b</id>
<content type='text'>
[ Upstream commit 961965c45c706175b24227868b1c12d72775e446 ]

Name it nand_interface_is_sdr() which will make even more sense when
nand_interface_is_nvddr() will be introduced.

Use it when relevant.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-2-miquel.raynal@bootlin.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: protect access to rawnand devices while in suspend</title>
<updated>2022-04-08T12:39:51Z</updated>
<author>
<name>Sean Nyekjaer</name>
<email>sean@geanix.com</email>
</author>
<published>2022-02-08T08:52:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3a21ee89bc22c2768aa6ccbf6fd85ccbab430f04'/>
<id>urn:sha1:3a21ee89bc22c2768aa6ccbf6fd85ccbab430f04</id>
<content type='text'>
commit 8cba323437a49a45756d661f500b324fc2d486fe upstream.

Prevent rawnand access while in a suspended state.

Commit 013e6292aaf5 ("mtd: rawnand: Simplify the locking") allows the
rawnand layer to return errors rather than waiting in a blocking wait.

Tested on a iMX6ULL.

Fixes: 013e6292aaf5 ("mtd: rawnand: Simplify the locking")
Signed-off-by: Sean Nyekjaer &lt;sean@geanix.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220208085213.1838273-1-sean@geanix.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the NAND framework user_conf object for ECC flags</title>
<updated>2020-09-30T14:44:15Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b5156335ac37f186812090795ed27884a76c3266'/>
<id>urn:sha1:b5156335ac37f186812090795ed27884a76c3266</id>
<content type='text'>
Instead of storing the ECC flags in chip-&gt;ecc.options, use
nanddev-&gt;ecc.user_conf.flags.

There is currently only one to save: NAND_ECC_MAXIMIZE.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the ECC framework user input parsing bits</title>
<updated>2020-09-30T14:44:15Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d7157ff49a5b5845b37b8f2bf31607f0af295ef1'/>
<id>urn:sha1:d7157ff49a5b5845b37b8f2bf31607f0af295ef1</id>
<content type='text'>
Many helpers are generic to all NAND chips, they should not be
raw-NAND specific, so use the generic ones.

To avoid moving all the raw NAND core "history" into the generic NAND
layer, we keep a part of this parsing in the raw NAND core to ensure
backward compatibility.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-20-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the ECC framework OOB layouts</title>
<updated>2020-09-30T14:43:52Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:52:05Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1e3b37aab958861a9d0c01ff6dbec96a82743701'/>
<id>urn:sha1:1e3b37aab958861a9d0c01ff6dbec96a82743701</id>
<content type='text'>
No need to have our own in the raw NAND core.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-18-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use the new ECC engine type enumeration</title>
<updated>2020-09-28T13:59:42Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bace41f80f65dc4ba13c892bac783e7e81847379'/>
<id>urn:sha1:bace41f80f65dc4ba13c892bac783e7e81847379</id>
<content type='text'>
Mechanical switch from the legacy "mode" enumeration to the new
"engine type" enumeration in drivers and board files.

The device tree parsing is also updated to return the new enumeration
from the old strings.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Separate the ECC engine type and the ECC byte placement</title>
<updated>2020-09-28T13:56:34Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ef24f97daac4d9450c956ab165d8337c2feca0e9'/>
<id>urn:sha1:ef24f97daac4d9450c956ab165d8337c2feca0e9</id>
<content type='text'>
The use of "syndrome" placement should not be encoded in the ECC
engine mode/type.

Create a "placement" field in NAND chip and change all occurrences of
the NAND_ECC_HW_SYNDROME enumeration to be just NAND_ECC_HW and
possibly a placement entry like NAND_ECC_PLACEMENT_INTERLEAVED.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-10-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Move the nand_ecc_algo enum to the generic NAND layer</title>
<updated>2020-08-27T08:56:00Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f2f64c1e924131878179da64794d9cb18ee5c827'/>
<id>urn:sha1:f2f64c1e924131878179da64794d9cb18ee5c827</id>
<content type='text'>
This enumeration is generic and will be reused NAND-wide.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-4-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Rename the ECC algorithm enumeration items</title>
<updated>2020-08-27T08:55:58Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-08-27T08:51:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e0a564ae0a4bc1bcf156d468955b27d3606e8253'/>
<id>urn:sha1:e0a564ae0a4bc1bcf156d468955b27d3606e8253</id>
<content type='text'>
NAND_ECC_ is not a meaningful prefix, use NAND_ECC_ALGO_ instead.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-3-miquel.raynal@bootlin.com
</content>
</entry>
</feed>
