Hosts the 0x221E linux distro kernel. https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-3.17.y 2014-07-09T09:25:59Z 2014-07-09T09:25:59Z Tim Kryger tim.kryger@gmail.com 2014-06-13T17:13:56Z urn:sha1:3a48edc4bd68f841c07c7bc86358d2f02133f247 Switch the common SDHCI code over to use mmc_host's regulator pointers and remove the ones in the sdhci_host structure. Additionally, use the common mmc_regulator_get_supply function to get the regulators and set the ocr_avail mask. This change sets the ocr_avail directly based upon the voltage ranges supported which ensures ocr_avail is set correctly while allowing the use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2014-05-22T12:33:30Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T12:00:12Z urn:sha1:da91a8f9c0f56d75b35bfe2e2456187ab55b3639 Track whether preset mode is currently enabled in hardware, and use that when making decisions elsewhere in the code rather than reading the register and checking the bit. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T12:33:25Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:59:31Z urn:sha1:d975f121011a58223c7936ab483c3374a83236c3 Rather than reading back the timing information from the registers, cache it locally. This allows implementations to translate the UHS timing by overriding the set_uhs_signaling() method as required without also having to emulate the SDHCI_HOST_CONTROL2 register. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T11:26:32Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:58:55Z urn:sha1:1771059cf5f9c09e37ef6315df8acf120f2642fc Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T11:26:28Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:57:18Z urn:sha1:0718e59ae259f7c48155b4e852d8b0632d59028e The Freescale esdhc driver is the only driver which needs the interrupt registers restored after a reset. Move this quirk to be part of the ESDHC driver implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T11:26:26Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:56:01Z urn:sha1:b537f94ce19583de1882f539a5cc49aa99260aca Rather than wasting cycles read-modify-writing the interrupt enable registers, cache the value locally instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T11:26:25Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:55:51Z urn:sha1:3560db8e247aa35bc6b287ec7ec51cd41abd512e There's no requirement to have the card tasklet separate now that we have a threaded interrupt handler, so kill this and move the called code into the threaded part of the handler. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-05-22T11:26:24Z Russell King rmk+kernel@arm.linux.org.uk 2014-04-25T11:55:46Z urn:sha1:781e989cf593c71d26bdca74f5e77b3651fc060e Use a generic threaded interrupt handler for SDIO interrupt handling, rather than allowing the SDIO core code to buggily spawn its own thread. This results in host drivers to be more in control of how SDIO interrupts are acknowledged in the hardware, rather than having the internals of the SDIO core placed upon them, possibly resulting in sub-standard handling. At least one SDHCI implementation specifies a very specific sequence to deal with a card interrupt. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net> 2014-02-22T18:19:40Z Micky Ching micky_ching@realsil.com.cn 2014-02-21T10:40:35Z urn:sha1:9107ebbf9652c033eb5dd10a6ea34a132db3cde1 Add support for realtek rts5250 pci card reader. The card reader has some problems with DDR50 mode, so add a new quirks2 for broken ddr50. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Chris Ball <chris@printf.net> 2014-01-13T18:03:18Z David Cohen david.a.cohen@linux.intel.com 2013-10-29T17:58:26Z urn:sha1:13868bf20f2f2c305f96e23620b024e167d6f9cb This patch defines a quirk for platforms unable to enable HS200 support. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: Dong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: Chris Ball <chris@printf.net>