kernel/include/linux/mfd/samsung/core.h, branch linux-5.10.y

regulator: s2mps11: Adjust supported buck voltages to real values

2019-07-02T11:43:25Z

The driver was registering buck regulators with unsupported range of voltages for S2MPS11 devices. Basically it assumed that all 256 values are possible for a single 8-bit I2C register controlling buck's voltage. This is not true, as datasheet describes subset of these which can be used. For example for buck[12346] the minimum voltage is 650 mV which corresponds to register value of 0x8. The driver was however registering regulator starting at 600 mV, so for a step of 6.25 mV this gave the same result. However this allowed to try to configure regulators to unsupported values. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Mark Brown

mfd: sec-core: Add SPDX license identifiers

2018-10-23T07:58:34Z

Replace GPL v2.0+ license statements with SPDX license identifiers. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones

regulator: s5m8767: Pass descriptor instead of GPIO number

2018-05-24T15:50:42Z

Instead of passing a global GPIO number for the enable GPIO, pass a descriptor looked up from the device tree node for the regulator. This regulator supports passing platform data, but enable/sleep regulators are looked up from the device tree exclusively, so we can need not touch other files. Signed-off-by: Linus Walleij Acked-by: Lee Jones Signed-off-by: Mark Brown

regulator: s2mps11: Set default ramp delay for S2MPS11 LDOs

2016-04-18T16:31:38Z

Driver did not provide default value for ramp delay for LDOs which lead to warning in dmesg, e.g. on Odroid XU4: [ 1.486076] vdd_ldo9: ramp_delay not set [ 1.506875] vddq_mmc2: ramp_delay not set [ 1.523766] vdd_ldo15: ramp_delay not set [ 1.544702] vdd_sd: ramp_delay not set The datasheet for all the S2MPS1x family is inconsistent here and does not specify unambiguously the value of ramp delay for LDO. It mentions 30 mV/us in one timing diagram but then omits it completely in LDO regulator characteristics table (it is specified for bucks). However the vendor kernels for Galaxy S5 and Odroid XU3 use values of 12 mV/us or 24 mV/us. Without the ramp delay value the consumers do not wait for voltage settle after changing it. Although the proper value of ramp delay for LDOs is unknown, it seems safer to use at least some value from reference kernel than to leave it unset. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Mark Brown

mfd: sec: Add support for S2MPS15 PMIC

2015-11-23T10:33:16Z

Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15 PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz clock outputs and battery charger. This patch adds initial support for LDO and buck regulators of S2MPS15 device. Signed-off-by: Thomas Abraham Signed-off-by: Alim Akhtar Reviewed-by: Krzysztof Kozlowski [Alim: Added s2mps15_devs like rtc and clk and related changes] Signed-off-by: Lee Jones

mfd: sec-core: Disable buck voltage reset on watchdog falling edge

2015-10-30T17:20:37Z

The WRSTBI bit (disabled by default but enabled by bootloader), when set, is responsible for resetting voltages to default values of certain bucks on falling edge of Warm Reset Input pin from AP. However on some boards (with S2MPS13) the pin is pulled down so any suspend will effectively trigger the reset of bucks supplying the power to the little and big cores. In the same time when resuming, these bucks must provide voltage greater or equal to voltage before suspend to match the frequency chosen by cpufreq. If voltage (default value of voltage after reset) is lower than one set by cpufreq before suspend, then system will hang during resuming. Signed-off-by: Krzysztof Kozlowski Reported-by: Bartlomiej Zolnierkiewicz Tested-by: Bartlomiej Zolnierkiewicz Signed-off-by: Lee Jones

mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-10-26T14:49:04Z

On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1 register must be manually set to 0 before initiating power off sequence. One of usual power down methods for Exynos based devices looks like: 1. PWRHOLD pin of PMIC is connected to PSHOLD of Exynos SoC. 2. Exynos holds up this pin during system operation. 3. ACOKB pin of PMIC is pulled up to VBATT and optionally to pin in other device. 4. When PWRHOLD/PSHOLD goes low, the PMIC will turn off the power if ACOKB goes high. On Odroid XU3 family the difference is in (3) - the ACOKB is grounded. This means that PMIC must manually set PWRHOLD field to low and then wait for signal from Application Processor (the usual change in PWRHOLD/PSHOLD pin will actually cut off the power). The patch adds respective binding allowing Odroid XU3 device to be powered off. Signed-off-by: Krzysztof Kozlowski Reported-by: Anand Moon Tested-by: Anand Moon Reviewed-by: Javier Martinez Canillas Signed-off-by: Lee Jones

mfd: sec: Cleanup unused RTC fields: ono, WTSR and SMPL

2015-03-03T17:30:18Z

The WTSR (Watchdog Timer Software Reset) and SMPL (Sudden Momentary Power Loss) were removed from rtc-s5m driver because they were not used. Remove them (and on/off interrupt) from main MFD driver and header. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones

regulator: s2mps11: Add support S2MPS13 regulator device

2014-11-25T15:55:06Z

This patch adds S2MPS13 regulator device to existing S2MPS11 device driver. The S2MPS13 has just different number of regulators from S2MPS14. The S2MPS13 regulator device includes LDO[1-40] and BUCK[1-10]. Signed-off-by: Chanwoo Choi Acked-by: Sangbeom Kim Acked-by: Mark Brown Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lee Jones

mfd: sec-core: Add support for S2MPS13 device

2014-11-25T15:55:01Z

This patch adds the support for Samsung S2MPS13 PMIC device to the sec-core MFD driver. The S2MPS13 is very similar with existing S2MPS14 and includes PMIC/ RTC/CLOCK devices. Signed-off-by: Chanwoo Choi Acked-by: Sangbeom Kim Signed-off-by: Lee Jones