<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/hardirq.h, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y'/>
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<updated>2020-12-02T19:20:05Z</updated>
<entry>
<title>irqtime: Move irqtime entry accounting after irq offset incrementation</title>
<updated>2020-12-02T19:20:05Z</updated>
<author>
<name>Frederic Weisbecker</name>
<email>frederic@kernel.org</email>
</author>
<published>2020-12-02T11:57:31Z</published>
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<id>urn:sha1:d3759e7184f8f6187e62f8c4e7dcb1f6c47c075a</id>
<content type='text'>
IRQ time entry is currently accounted before HARDIRQ_OFFSET or
SOFTIRQ_OFFSET are incremented. This is convenient to decide to which
index the cputime to account is dispatched.

Unfortunately it prevents tick_irq_enter() from being called under
HARDIRQ_OFFSET because tick_irq_enter() has to be called before the IRQ
entry accounting due to the necessary clock catch up. As a result we
don't benefit from appropriate lockdep coverage on tick_irq_enter().

To prepare for fixing this, move the IRQ entry cputime accounting after
the preempt offset is incremented. This requires the cputime dispatch
code to handle the extra offset.

Signed-off-by: Frederic Weisbecker &lt;frederic@kernel.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Link: https://lore.kernel.org/r/20201202115732.27827-5-frederic@kernel.org

</content>
</entry>
<entry>
<title>x86/entry: Fix NMI vs IRQ state tracking</title>
<updated>2020-07-10T10:00:01Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2020-05-27T13:50:29Z</published>
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<id>urn:sha1:ba1f2b2eaa2a529dba722507c55ff3d761d325dd</id>
<content type='text'>
While the nmi_enter() users did
trace_hardirqs_{off_prepare,on_finish}() there was no matching
lockdep_hardirqs_*() calls to complete the picture.

Introduce idtentry_{enter,exit}_nmi() to enable proper IRQ state
tracking across the NMIs.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Reviewed-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lkml.kernel.org/r/20200623083721.216740948@infradead.org
</content>
</entry>
<entry>
<title>genirq: Provide __irq_enter/exit_raw()</title>
<updated>2020-06-11T13:15:06Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2020-05-21T20:05:22Z</published>
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<id>urn:sha1:98a3bf195e1a14755da3d2b83e1dbb4a3158866d</id>
<content type='text'>
Like __irq_enter/exit() but without time accounting. To be used for "empty"
system vectors like the scheduler IPI to avoid the overhead.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Reviewed-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Link: https://lore.kernel.org/r/20200521202117.671682341@linutronix.de


</content>
</entry>
<entry>
<title>genirq: Provide irq_enter/exit_rcu()</title>
<updated>2020-06-11T13:15:06Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2020-05-21T20:05:21Z</published>
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<id>urn:sha1:8a6bc4787f05d087fda8e11ead225c8830250703</id>
<content type='text'>
irq_enter()/exit() currently include RCU handling. To properly separate the RCU
handling code, provide variants which contain only the non-RCU related
functionality.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Reviewed-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Link: https://lore.kernel.org/r/20200521202117.567023613@linutronix.de


</content>
</entry>
<entry>
<title>nmi, tracing: Make hardware latency tracing noinstr safe</title>
<updated>2020-06-11T13:15:04Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2020-05-21T20:05:14Z</published>
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<id>urn:sha1:2ab70319bc1f79228da4dce7b9d604740c9beeef</id>
<content type='text'>
The hardware latency tracer calls into instrumentable functions. Move the
calls into the RCU watching sections and annotate them.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: Paul E. McKenney &lt;paulmck@kernel.org&gt;
Link: https://lore.kernel.org/r/20200521202116.904176298@linutronix.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;


</content>
</entry>
<entry>
<title>rcu: Abstract out rcu_irq_enter_check_tick() from rcu_nmi_enter()</title>
<updated>2020-05-26T17:04:18Z</updated>
<author>
<name>Paul E. McKenney</name>
<email>paulmck@kernel.org</email>
</author>
<published>2020-05-21T20:05:15Z</published>
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<id>urn:sha1:aaf2bc50df1f4bfc6857fc601fc7b21d5a18c6a1</id>
<content type='text'>
There will likely be exception handlers that can sleep, which rules
out the usual approach of invoking rcu_nmi_enter() on entry and also
rcu_nmi_exit() on all exit paths.  However, the alternative approach of
just not calling anything can prevent RCU from coaxing quiescent states
from nohz_full CPUs that are looping in the kernel:  RCU must instead
IPI them explicitly.  It would be better to enable the scheduler tick
on such CPUs to interact with RCU in a lighter-weight manner, and this
enabling is one of the things that rcu_nmi_enter() currently does.

What is needed is something that helps RCU coax quiescent states while
not preventing subsequent sleeps.  This commit therefore splits out the
nohz_full scheduler-tick enabling from the rest of the rcu_nmi_enter()
logic into a new function named rcu_irq_enter_check_tick().

[ tglx: Renamed the function and made it a nop when context tracking is off ]
[ mingo: Fixed a CONFIG_NO_HZ_FULL assumption, harmonized and fixed all the
         comment blocks and cleaned up rcu_nmi_enter()/exit() definitions. ]

Suggested-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Signed-off-by: Paul E. McKenney &lt;paulmck@kernel.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20200521202116.996113173@linutronix.de
</content>
</entry>
<entry>
<title>sched,rcu,tracing: Avoid tracing before in_nmi() is correct</title>
<updated>2020-05-19T13:51:18Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2020-02-12T20:01:16Z</published>
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<id>urn:sha1:f93524eb9c54f49be150167918f6546b0a2e09b1</id>
<content type='text'>
If a tracer is invoked before in_nmi() becomes true, the tracer can no
longer detect it is called from NMI context and behave correctly.

Therefore change nmi_{enter,exit}() to use __preempt_count_{add,sub}()
as the normal preempt_count_{add,sub}() have a (desired) function
trace entry.

This fixes a potential issue with the current code; when the function-tracer
has stack-tracing enabled __trace_stack() will malfunction when it hits the
preempt_count_add() function entry from NMI context.

Suggested-by: Steven Rostedt (VMware) &lt;rosted@goodmis.org&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Steven Rostedt (VMware) &lt;rostedt@goodmis.org&gt;
Reviewed-by: Alexandre Chartre &lt;alexandre.chartre@oracle.com&gt;
Link: https://lkml.kernel.org/r/20200505134101.434193525@linutronix.de


</content>
</entry>
<entry>
<title>hardirq/nmi: Allow nested nmi_enter()</title>
<updated>2020-05-19T13:51:17Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2020-02-19T08:46:47Z</published>
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<id>urn:sha1:69ea03b56ed2c7189ccd0b5910ad39f3cad1df21</id>
<content type='text'>
Since there are already a number of sites (ARM64, PowerPC) that effectively
nest nmi_enter(), make the primitive support this before adding even more.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lkml.kernel.org/r/20200505134100.864179229@linutronix.de


</content>
</entry>
<entry>
<title>lockdep: Rename trace_hardirq_{enter,exit}()</title>
<updated>2020-03-21T15:03:53Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2020-03-20T11:56:40Z</published>
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<id>urn:sha1:2502ec37a7b228b34c1e2e89480f98b92f53046a</id>
<content type='text'>
Continue what commit:

  d820ac4c2fa8 ("locking: rename trace_softirq_[enter|exit] =&gt; lockdep_softirq_[enter|exit]")

started, rename these to avoid confusing them with tracepoints.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Link: https://lkml.kernel.org/r/20200320115859.060481361@infradead.org

</content>
</entry>
<entry>
<title>arm64: Fix HCR.TGE status for NMI contexts</title>
<updated>2019-02-06T10:05:16Z</updated>
<author>
<name>Julien Thierry</name>
<email>julien.thierry@arm.com</email>
</author>
<published>2019-01-31T14:58:39Z</published>
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<id>urn:sha1:5870970b9a828d8693aa6d15742573289d7dbcd0</id>
<content type='text'>
When using VHE, the host needs to clear HCR_EL2.TGE bit in order
to interact with guest TLBs, switching from EL2&amp;0 translation regime
to EL1&amp;0.

However, some non-maskable asynchronous event could happen while TGE is
cleared like SDEI. Because of this address translation operations
relying on EL2&amp;0 translation regime could fail (tlb invalidation,
userspace access, ...).

Fix this by properly setting HCR_EL2.TGE when entering NMI context and
clear it if necessary when returning to the interrupted context.

Signed-off-by: Julien Thierry &lt;julien.thierry@arm.com&gt;
Suggested-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: linux-arch@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
</feed>
