<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/coresight.h, branch linux-5.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.17.y</id>
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<updated>2021-08-18T20:33:28Z</updated>
<entry>
<title>coresight: syscfg: Add API to activate and enable configurations</title>
<updated>2021-08-18T20:33:28Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@linaro.org</email>
</author>
<published>2021-08-18T19:40:16Z</published>
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<id>urn:sha1:f8cce2ff3c04361b8843d8489620fda8880f668b</id>
<content type='text'>
Configurations are first activated, then when any coresight device is
enabled, the active configurations are checked and any matching
one is enabled.

This patch provides the activation / enable API.

Link: https://lore.kernel.org/r/20210723165444.1048-6-mike.leach@linaro.org
Signed-off-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20210818194022.379573-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: syscfg: Add registration and feature loading for cs devices</title>
<updated>2021-08-18T20:33:27Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@linaro.org</email>
</author>
<published>2021-08-18T19:40:13Z</published>
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<id>urn:sha1:42ff700f3112babac129f4ae33023a7b7ce40a29</id>
<content type='text'>
API for individual devices to register with the syscfg management
system is added.

Devices register with matching information, and any features or
configurations that match will be loaded into the device.

The feature and configuration loading is extended so that on load these
are loaded into any currently registered devices. This allows
configuration loading after devices have been registered.

Link: https://lore.kernel.org/r/20210723165444.1048-3-mike.leach@linaro.org
Signed-off-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20210818194022.379573-3-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: core: Add support for dedicated percpu sinks</title>
<updated>2021-04-06T22:05:38Z</updated>
<author>
<name>Anshuman Khandual</name>
<email>anshuman.khandual@arm.com</email>
</author>
<published>2021-04-05T16:43:03Z</published>
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<id>urn:sha1:2cd87a7b293dedbbaea3b6739f95d428a2d9890d</id>
<content type='text'>
Add support for dedicated sinks that are bound to individual CPUs. (e.g,
TRBE). To allow quicker access to the sink for a given CPU bound source,
keep a percpu array of the sink devices. Also, add support for building
a path to the CPU local sink from the ETM.

This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM.
This new sink type is exclusively available and can only work with percpu
source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC.

This defines a percpu structure that accommodates a single coresight_device
which can be used to store an initialized instance from a sink driver. As
these sinks are exclusively linked and dependent on corresponding percpu
sources devices, they should also be the default sink device during a perf
session.

Outwards device connections are scanned while establishing paths between a
source and a sink device. But such connections are not present for certain
percpu source and sink devices which are exclusively linked and dependent.
Build the path directly and skip connection scanning for such devices.

Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Cc: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Tested-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
[Moved the set/get percpu sink APIs from TRBE patch to here
 Fixed build break on arm32]
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20210405164307.1720226-17-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
</content>
</entry>
<entry>
<title>coresight: Convert claim/disclaim operations to use access wrappers</title>
<updated>2021-02-04T16:00:32Z</updated>
<author>
<name>Suzuki K Poulose</name>
<email>suzuki.poulose@arm.com</email>
</author>
<published>2021-02-01T18:13:28Z</published>
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<id>urn:sha1:8ce0029658ba16c52670e869b9ccde02ae7dec6b</id>
<content type='text'>
Convert the generic CLAIM tag management APIs to use the
device access layer abstraction.

Link: https://lore.kernel.org/r/20210110224850.1880240-7-suzuki.poulose@arm.com
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20210201181351.1475223-9-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Convert coresight_timeout to use access abstraction</title>
<updated>2021-02-04T16:00:32Z</updated>
<author>
<name>Suzuki K Poulose</name>
<email>suzuki.poulose@arm.com</email>
</author>
<published>2021-02-01T18:13:27Z</published>
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<id>urn:sha1:020052825e49128d381d6444d1ce079e8ca82386</id>
<content type='text'>
Convert the generic routines to use the new access abstraction layer
gradually, starting with coresigth_timeout.

Link: https://lore.kernel.org/r/20210110224850.1880240-6-suzuki.poulose@arm.com
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20210201181351.1475223-8-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Introduce device access abstraction</title>
<updated>2021-02-04T16:00:32Z</updated>
<author>
<name>Suzuki K Poulose</name>
<email>suzuki.poulose@arm.com</email>
</author>
<published>2021-02-01T18:13:25Z</published>
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<id>urn:sha1:6e736c60a9fe905b3e4f4b07171a31ad602d56d2</id>
<content type='text'>
We are about to introduce support for sysreg access to ETMv4.4+
component. Since there are generic routines that access the
registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout)
and in order to preserve the logic of these operations at a
single place we introduce an abstraction layer for the accesses
to a given device.

Link: https://lore.kernel.org/r/20210110224850.1880240-4-suzuki.poulose@arm.com
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20210201181351.1475223-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: cti: Don't disable ect device if it's not enabled</title>
<updated>2020-09-28T17:47:41Z</updated>
<author>
<name>Tingwei Zhang</name>
<email>tingwei@codeaurora.org</email>
</author>
<published>2020-09-28T16:35:07Z</published>
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<id>urn:sha1:f2ccc7b7bfa91b5cad5a4d57b269f6d7bbafd67d</id>
<content type='text'>
If associated ect device is not enabled at first place, disable
routine should not be called. Add ect_enabled flag to check whether
ect device is enabled. Fix the issue in below case.  Ect device is
not available when associated coresight device enabled and the
association is established after coresight device is enabled.

Signed-off-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: Tingwei Zhang &lt;tingwei@codeaurora.org&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20200928163513.70169-20-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Use IS_ENABLED for CONFIGs that may be modules</title>
<updated>2020-09-28T17:47:40Z</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@arm.com</email>
</author>
<published>2020-09-28T16:34:51Z</published>
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<id>urn:sha1:b8127113d01e53adba15b41aefd37b90ed83d631</id>
<content type='text'>
Checking for ifdef CONFIG_x fails if CONFIG_x=m.  Use IS_ENABLED
that is true for both built-ins and modules, instead.  Required
when building coresight components as modules.

Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Leo Yan &lt;leo.yan@linaro.org&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Suzuki K Poulose &lt;Suzuki.Poulose@arm.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@arm.com&gt;
Signed-off-by: Tingwei Zhang &lt;tingwei@codeaurora.org&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20200928163513.70169-4-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Add default sink selection to CoreSight base</title>
<updated>2020-07-21T13:48:40Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@linaro.org</email>
</author>
<published>2020-07-16T17:57:43Z</published>
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<id>urn:sha1:0336bdfd7354edfa3db0e01675b5df224516e3e9</id>
<content type='text'>
Adds a method to select a suitable sink connected to a given source.

In cases where no sink is defined, the coresight_find_default_sink
routine can search from a given source, through the child connections
until a suitable sink is found.

The suitability is defined in by the sink coresight_dev_subtype on the
CoreSight device, and the distance from the source by counting
connections.

Higher value subtype is preferred - where these are equal, shorter
distance from source is used as a tie-break.

This allows for default sink to be discovered were none is specified
(e.g. perf command line)

Signed-off-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Suggested-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Reviewed-by: Leo Yan &lt;leo.yan@linaro.org&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20200716175746.3338735-15-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Fix comment in main header file</title>
<updated>2020-07-21T13:48:39Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@linaro.org</email>
</author>
<published>2020-07-16T17:57:40Z</published>
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<id>urn:sha1:d061cd734f1a59798574b50188b14b49e95a54d3</id>
<content type='text'>
Comment for an elemnt in the coresight_device structure appears to have
been corrupted and makes no sense. Fix this before making further changes.

Signed-off-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Link: https://lore.kernel.org/r/20200716175746.3338735-12-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
