<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/linux/clk/sunxi.h, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
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<updated>2015-01-14T09:45:27Z</updated>
<entry>
<title>clk: sunxi: Remove custom phase function</title>
<updated>2015-01-14T09:45:27Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2014-07-12T10:10:04Z</published>
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<id>urn:sha1:a7d19057e7160a566bad9b2ba070a391fb78df96</id>
<content type='text'>
Now that we don't have any user left for our custom phase function, we can
safely remove this hack from the code.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Tested-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk</title>
<updated>2014-05-14T23:58:21Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2014-05-12T12:04:47Z</published>
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<id>urn:sha1:a97181adf1502128e2945b4fef2591249c565467</id>
<content type='text'>
__clk_get_hw is supposed to be used by clk providers, not clk consumers.

Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Implement MMC phase control</title>
<updated>2014-05-05T22:55:57Z</updated>
<author>
<name>Emilio López</name>
<email>emilio@elopez.com.ar</email>
</author>
<published>2014-05-02T15:57:16Z</published>
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<id>urn:sha1:95713978b0a2929b72933235bb07c0a793e71afa</id>
<content type='text'>
HdG: add header exporting clk_sunxi_mmc_phase_control

Signed-off-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: declare OF clock provider</title>
<updated>2013-09-29T19:07:16Z</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2013-09-06T12:59:57Z</published>
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<id>urn:sha1:be0804513a506de96925f9ed1aa8dc1facd4c180</id>
<content type='text'>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: arm: sunxi: Add a new clock driver for sunxi SOCs</title>
<updated>2013-03-27T15:35:34Z</updated>
<author>
<name>Emilio López</name>
<email>emilio@elopez.com.ar</email>
</author>
<published>2013-02-25T14:44:26Z</published>
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<id>urn:sha1:e874a6697710f52fa8ab29487a99034d5d96fdcc</id>
<content type='text'>
This commit implements the base CPU clocks for sunxi devices. It has
been tested using a slightly modified cpufreq driver from the
linux-sunxi 3.0 tree.

Additionally, document the new bindings introduced by this patch.

Idling:
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            60000000
              cpu                   0           0            60000000
                 axi                0           0            60000000
                    ahb             0           0            60000000
                       apb0         0           0            30000000
     dummy                          0           0            0

After "yes &gt;/dev/null &amp;":
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            1008000000
              cpu                   0           0            1008000000
                 axi                0           0            336000000
                    ahb             0           0            168000000
                       apb0         0           0            84000000
     dummy                          0           0            0

Signed-off-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Use common of_clk_init() function</title>
<updated>2013-01-24T19:12:23Z</updated>
<author>
<name>Prashant Gaikwad</name>
<email>pgaikwad@nvidia.com</email>
</author>
<published>2013-01-04T07:00:54Z</published>
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<id>urn:sha1:85a181986c9cf8bbd2c4f2fb6f2add7ac5db1f76</id>
<content type='text'>
Use common of_clk_init() function to initialize clocks.

Signed-off-by: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@anandra.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs</title>
<updated>2012-11-16T20:46:39Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2012-11-16T20:21:43Z</published>
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<id>urn:sha1:404525d5a7ecc847b5ac178dad96402f1e102ccc</id>
<content type='text'>
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Mike Turquette &lt;mturquette@ti.com&gt;
</content>
</entry>
</feed>
