kernel/include/linux/clk/at91_pmc.h, branch linux-5.10.y

clk: at91: clk-utmi: add utmi support for sama7g5

2020-07-24T09:19:08Z

Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via XTALF register. Values written at bits 2..0 in this register correspond to the on board crystal oscillator frequency. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/1595403506-8209-18-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd

clk: at91: add macro for pll ids mask

2020-07-24T09:19:08Z

Add macro for PLL IDs mask. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/1595403506-8209-16-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd

clk: at91: clk-master: add master clock support for SAMA7G5

2020-07-24T09:19:08Z

Add master clock support (MCK1..4) for SAMA7G5. SAMA7G5's PMC has multiple master clocks feeding different subsystems. One of them feeds image subsystem and is changeable based on image subsystem needs. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/1595403506-8209-13-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd

clk: at91: move sam9x60's PLL register offsets to PMC header

2020-02-18T20:47:54Z

Move SAM9X60's PLL register offsets to PMC header so that the definitions would also be available from arch/arm/mach-at91/pm_suspend.S. This is necessary to disable/enable PLLA for SAM9X60 on suspend/resume. Signed-off-by: Claudiu Beznea Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/1579522208-19523-7-git-send-email-claudiu.beznea@microchip.com

ARM: at91: pm: add pmc_version member to at91_pm_data

2020-02-18T20:47:54Z

This will be used to differentiate b/w different PLLs settings to be applied in the final/first steps of the suspend/resume process by doing PLL specific configurations. Signed-off-by: Claudiu Beznea Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

Merge tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

2019-05-16T18:05:11Z

AT91 SoC for 5.2 - PM changes for SAM9X60 * tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: do not disable/enable PLLA for ULP modes ARM: at91: pm: disable RC oscillator in ULP0 ARM: at91: pm: add ULP1 support for SAM9X60 ARM: at91: pm: add support for per SoC wakeup source configuration ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs ARM: at91: pm: initial PM support for SAM9X60 dt-bindings: arm: atmel: add binding for SAM9X60 SoC ARM: at91: pm: introduce at91_soc_pm structure Signed-off-by: Olof Johansson

clk: at91: master: Add sam9x60 support

2019-04-25T19:34:05Z

The sam9x60 cpu clock is located at a different offset but is otherwise similar to the master clock. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd

clk: at91: allow configuring generated PCR layout

2019-04-25T19:34:03Z

The PCR register layout for GCLKCSS is changing for the future SoCs, allow configuring it. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd

clk: at91: allow configuring peripheral PCR layout

2019-04-25T19:34:03Z

The PCR register actually changed layout for each SoC. By chance, this didn't have impact on sama5d[2-4] support but since sama5d3, PID is seven bits wide and sama5d4 and sama5d2 don't have DIV. For the DT backward compatibility, keep the layout as is. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd