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<title>kernel/include/kvm/arm_vgic.h, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
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<updated>2015-04-07T16:09:20Z</updated>
<entry>
<title>Merge tag 'kvm-arm-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into 'kvm-next'</title>
<updated>2015-04-07T16:09:20Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2015-04-07T16:09:20Z</published>
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<id>urn:sha1:bf0fb67cf957fc8ecfaaa2819b7d6a0f795e2ef2</id>
<content type='text'>
KVM/ARM changes for v4.1:

- fixes for live migration
- irqfd support
- kvm-io-bus &amp; vgic rework to enable ioeventfd
- page ageing for stage-2 translation
- various cleanups
</content>
</entry>
<entry>
<title>KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus</title>
<updated>2015-03-30T16:07:19Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2015-03-28T01:13:13Z</published>
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<id>urn:sha1:950324ab81bf006542f30a1d1ab3d65fcf15cbc1</id>
<content type='text'>
Currently we have struct kvm_exit_mmio for encapsulating MMIO abort
data to be passed on from syndrome decoding all the way down to the
VGIC register handlers. Now as we switch the MMIO handling to be
routed through the KVM MMIO bus, it does not make sense anymore to
use that structure already from the beginning. So we keep the data in
local variables until we put them into the kvm_io_bus framework.
Then we fill kvm_exit_mmio in the VGIC only, making it a VGIC private
structure. On that way we replace the data buffer in that structure
with a pointer pointing to a single location in a local variable, so
we get rid of some copying on the way.
With all of the virtual GIC emulation code now being registered with
the kvm_io_bus, we can remove all of the old MMIO handling code and
its dispatching functionality.

I didn't bother to rename kvm_exit_mmio (to vgic_mmio or something),
because that touches a lot of code lines without any good reason.

This is based on an original patch by Nikolay.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Cc: Nikolay Nikolaev &lt;n.nikolaev@virtualopensystems.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: prepare GICv3 emulation to use kvm_io_bus MMIO handling</title>
<updated>2015-03-30T16:07:13Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2015-03-26T14:39:37Z</published>
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<id>urn:sha1:fb8f61abab48467ef670ef165ff664cdc94f742e</id>
<content type='text'>
Using the framework provided by the recent vgic.c changes, we
register a kvm_io_bus device on mapping the virtual GICv3 resources.
The distributor mapping is pretty straight forward, but the
redistributors need some more love, since they need to be tagged with
the respective redistributor (read: VCPU) they are connected with.
We use the kvm_io_bus framework to register one devices per VCPU.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: prepare GICv2 emulation to be handled by kvm_io_bus</title>
<updated>2015-03-26T21:43:15Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2015-03-26T14:39:35Z</published>
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<id>urn:sha1:a9cf86f62b785202684c3ba92895946f03d910c8</id>
<content type='text'>
Using the framework provided by the recent vgic.c changes we register
a kvm_io_bus device when initializing the virtual GICv2.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: implement kvm_io_bus MMIO handling for the VGIC</title>
<updated>2015-03-26T21:43:14Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2015-03-26T14:39:34Z</published>
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<id>urn:sha1:6777f77f0f544f686ee3158ff0db6a7d81b7d3a2</id>
<content type='text'>
Currently we use a lot of VGIC specific code to do the MMIO
dispatching.
Use the previous reworks to add kvm_io_bus style MMIO handlers.

Those are not yet called by the MMIO abort handler, also the actual
VGIC emulator function do not make use of it yet, but will be enabled
with the following patches.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: support for un-queuing active IRQs</title>
<updated>2015-03-14T12:46:44Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@linaro.org</email>
</author>
<published>2015-03-13T17:02:54Z</published>
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<id>urn:sha1:47a98b15ba7cf6a13bd94ab8455d3f586b16420b</id>
<content type='text'>
Migrating active interrupts causes the active state to be lost
completely. This implements some additional bitmaps to track the active
state on the distributor and export this to user space.

Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: Keep elrsr/aisr in sync with software model</title>
<updated>2015-03-14T12:42:07Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@linaro.org</email>
</author>
<published>2015-03-13T17:02:56Z</published>
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<id>urn:sha1:ae705930fca6322600690df9dc1c7d0516145a93</id>
<content type='text'>
There is an interesting bug in the vgic code, which manifests itself
when the KVM run loop has a signal pending or needs a vmid generation
rollover after having disabled interrupts but before actually switching
to the guest.

In this case, we flush the vgic as usual, but we sync back the vgic
state and exit to userspace before entering the guest.  The consequence
is that we will be syncing the list registers back to the software model
using the GICH_ELRSR and GICH_EISR from the last execution of the guest,
potentially overwriting a list register containing an interrupt.

This showed up during migration testing where we would capture a state
where the VM has masked the arch timer but there were no interrupts,
resulting in a hung test.

Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reported-by: Alex Bennee &lt;alex.bennee@linaro.org&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: Kill CONFIG_KVM_ARM_{VGIC,TIMER}</title>
<updated>2015-03-12T14:15:27Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@linaro.org</email>
</author>
<published>2015-03-11T13:21:31Z</published>
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<id>urn:sha1:662d9715840aef44dcb573b0f9fab9e8319c868a</id>
<content type='text'>
We can definitely decide at run-time whether to use the GIC and timers
or not, and the extra code and data structures that we allocate space
for is really negligable with this config option, so I don't think it's
worth the extra complexity of always having to define stub static
inlines.  The !CONFIG_KVM_ARM_VGIC/TIMER case is pretty much an untested
code path anyway, so we're better off just getting rid of it.

Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: allow userland to request a virtual GICv3</title>
<updated>2015-01-20T17:25:33Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2014-06-03T08:26:30Z</published>
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<id>urn:sha1:ac3d373564d9744068d867a0eb16da2ff8d5ee9d</id>
<content type='text'>
With all of the GICv3 code in place now we allow userland to ask the
kernel for using a virtual GICv3 in the guest.
Also we provide the necessary support for guests setting the memory
addresses for the virtual distributor and redistributors.
This requires some userland code to make use of that feature and
explicitly ask for a virtual GICv3.
Document that KVM_CREATE_IRQCHIP only works for GICv2, but is
considered legacy and using KVM_CREATE_DEVICE is preferred.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm/arm64: KVM: enable kernel side of GICv3 emulation</title>
<updated>2015-01-20T17:25:32Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2014-06-03T08:26:03Z</published>
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<id>urn:sha1:b5d84ff600a244b655bd4f657f5350f29b0ce611</id>
<content type='text'>
With all the necessary GICv3 emulation code in place, we can now
connect the code to the GICv3 backend in the kernel.
The LR register handling is different depending on the emulated GIC
model, so provide different implementations for each.
Also allow non-v2-compatible GICv3 implementations (which don't
provide MMIO regions for the virtual CPU interface in the DT), but
restrict those hosts to support GICv3 guests only.
If the device tree provides a GICv2 compatible GICV resource entry,
but that one is faulty, just disable the GICv2 emulation and let the
user use at least the GICv3 emulation for guests.
To provide proper support for the legacy KVM_CREATE_IRQCHIP ioctl,
note virtual GICv2 compatibility in struct vgic_params and use it
on creating a VGICv2.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
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