<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/dt-bindings/soc, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2020-08-17T16:14:04Z</updated>
<entry>
<title>MIPS: BMIPS: add BCM6318 power domain definitions</title>
<updated>2020-08-17T16:14:04Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=8bf86a155688f3acbc5919cdf58c59378d62a663'/>
<id>urn:sha1:8bf86a155688f3acbc5919cdf58c59378d62a663</id>
<content type='text'>
BCM6318 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM63268 power domain definitions</title>
<updated>2020-08-17T16:14:04Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5a3be0d0ccfb21d1223f77746d260450d94df9e4'/>
<id>urn:sha1:5a3be0d0ccfb21d1223f77746d260450d94df9e4</id>
<content type='text'>
BCM63268 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM6362 power domain definitions</title>
<updated>2020-08-17T16:14:04Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:34Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9f9fd9766a288e259ad7cefbf3e45e1ec117b50b'/>
<id>urn:sha1:9f9fd9766a288e259ad7cefbf3e45e1ec117b50b</id>
<content type='text'>
BCM6362 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM6328 power domain definitions</title>
<updated>2020-08-17T16:14:04Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5292481134b2c4d64e1279158917dc9b53713721'/>
<id>urn:sha1:5292481134b2c4d64e1279158917dc9b53713721</id>
<content type='text'>
BCM6328 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock</title>
<updated>2020-02-17T09:09:19Z</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2020-01-14T07:24:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cd88f16792011a90aa9cda12233f136a528acab3'/>
<id>urn:sha1:cd88f16792011a90aa9cda12233f136a528acab3</id>
<content type='text'>
Tegra PMC has blink functionality that allows 32 kHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings</title>
<updated>2020-02-17T09:07:39Z</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2020-01-14T07:24:12Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f85fa3198dfc4e359cc6efa58854853b0824bae8'/>
<id>urn:sha1:f85fa3198dfc4e359cc6efa58854853b0824bae8</id>
<content type='text'>
Tegra PMC has 3 clocks clk_out_1, clk_out_2, and clk_out_3.

This patch documents PMC clock bindings and adds a header defining
Tegra PMC clock ids.

Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access</title>
<updated>2019-09-04T18:44:34Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2019-08-27T03:00:40Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7a800c418c684372146f98f857d632caa30125f4'/>
<id>urn:sha1:7a800c418c684372146f98f857d632caa30125f4</id>
<content type='text'>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.

Acked-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284</title>
<updated>2019-06-05T15:36:37Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-29T14:17:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=97fb5e8d9b57f10f294303c9a5d1bd033eded6bf'/>
<id>urn:sha1:97fb5e8d9b57f10f294303c9a5d1bd033eded6bf</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194</title>
<updated>2019-05-30T18:29:22Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-28T16:57:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=af873fcecef567abf8a3468b06dd4e4aab46da6d'/>
<id>urn:sha1:af873fcecef567abf8a3468b06dd4e4aab46da6d</id>
<content type='text'>
Based on 1 normalized pattern(s):

  license terms gnu general public license gpl version 2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Reviewed-by: Steve Winslow &lt;swinslow@gmail.com&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>soc: bcm: bcm2835-pm: Add support for power domains under a new binding.</title>
<updated>2019-01-09T15:55:09Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2018-12-12T23:51:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=670c672608a1ffcbc7ac0f872734843593bb8b15'/>
<id>urn:sha1:670c672608a1ffcbc7ac0f872734843593bb8b15</id>
<content type='text'>
This provides a free software alternative to raspberrypi-power.c's
firmware calls to manage power domains.  It also exposes a reset line,
where previously the vc4 driver had to try to force power off the
domain in order to trigger a reset.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Stefan Wahren &lt;stefan.wahren@i2se.com&gt;
Signed-off-by: Stefan Wahren &lt;stefan.wahren@i2se.com&gt;
</content>
</entry>
</feed>
