<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/dt-bindings/pinctrl, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2020-10-24T17:26:06Z</updated>
<entry>
<title>Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-10-24T17:26:06Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-10-24T17:26:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1f70935f637dfba226bf77182c2629fde61ed06e'/>
<id>urn:sha1:1f70935f637dfba226bf77182c2629fde61ed06e</id>
<content type='text'>
Pull ARM SoC fixes from Olof Johansson:
 "I had queued up a batch of fixes that got a bit close to the release
  for sending in before the merge window opened, so I'm including them
  in the merge window batch instead.

  Mostly smaller DT tweaks and fixes, the usual mix that we tend to have
  through the releases"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: iwg20d-q7-common: Fix touch controller probe failure
  ARM: OMAP2+: Restore MPU power domain if cpu_cluster_pm_enter() fails
  ARM: dts: am33xx: modify AM33XX_IOPAD for #pinctrl-cells = 2
  soc: actions: include header to fix missing prototype
  arm64: dts: ti: k3-j721e: Rename mux header and update macro names
  soc: qcom: pdr: Fixup array type of get_domain_list_resp message
  arm64: dts: qcom: pm660: Fix missing pound sign in interrupt-cells
  arm64: dts: qcom: kitakami: Temporarily disable SDHCI1
  arm64: dts: sdm630: Temporarily disable SMMUs by default
  arm64: dts: sdm845: Fixup OPP table for all qup devices
  arm64: dts: allwinner: h5: remove Mali GPU PMU module
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix dcdc1 regulator
  soc: xilinx: Fix error code in zynqmp_pm_probe()
</content>
</entry>
<entry>
<title>ARM: dts: am33xx: modify AM33XX_IOPAD for #pinctrl-cells = 2</title>
<updated>2020-09-23T07:39:26Z</updated>
<author>
<name>Drew Fustini</name>
<email>drew@beagleboard.org</email>
</author>
<published>2020-09-21T22:50:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b753e41d9999c040c601de53cc1e072160472d80'/>
<id>urn:sha1:b753e41d9999c040c601de53cc1e072160472d80</id>
<content type='text'>
Modify the AM33XX_IOPAD macro so that it works now that #pinctrl-cells =
&lt;2&gt;. The third parameter is just a zero and the pinctrl-single driver
will just OR this with the second parameter so it has no actual effect.

There are no longer any dts files using this macro (following my patch
to am335x-guardian.dts), but this will keep dts files not in mainline
from breaking.

Fixes: 27c90e5e48d0 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2")
Suggested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reported-by: Trent Piepho &lt;tpiepho@gmail.com&gt;
Link: https://lore.kernel.org/linux-devicetree/20200921064707.GN7101@atomide.com/
Signed-off-by: Drew Fustini &lt;drew@beagleboard.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: mt8192: add pinctrl file</title>
<updated>2020-08-27T08:50:49Z</updated>
<author>
<name>Zhiyong Tao</name>
<email>zhiyong.tao@mediatek.com</email>
</author>
<published>2020-08-17T00:17:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7c81b7199b79e053db7b909e667f2a88e6c437b0'/>
<id>urn:sha1:7c81b7199b79e053db7b909e667f2a88e6c437b0</id>
<content type='text'>
This patch adds pinctrl file for mt8192.

Signed-off-by: Zhiyong Tao &lt;zhiyong.tao@mediatek.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20200817001702.1646-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2020-08-09T19:52:28Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-08-09T19:52:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9420f1ce01869409d78901c3e036b2c437cbc6b8'/>
<id>urn:sha1:9420f1ce01869409d78901c3e036b2c437cbc6b8</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of the pin control changes for the v5.9 kernel
  series:

  Core changes:

   - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
     macro" was put in an immutable branch and merged into the pinctrl
     tree as well. We see these changes also here.

   - Improved debug output for pins used as GPIO.

  New drivers:

   - Ocelot Sparx5 SoC driver.

   - Intel Emmitsburg SoC subdriver.

   - Intel Tiger Lake-H SoC subdriver.

   - Qualcomm PM660 SoC subdriver.

   - Renesas SH-PFC R8A774E1 subdriver.

  Driver improvements:

   - Linear improvement and cleanups of the Intel drivers for
     Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
     things.

   - Renesas SH-PFC has added support for RPC pins, groups, and
     functions to r8a77970 and r8a77980.

   - The newere Freescale (now NXP) i.MX8 pin controllers have been
     modularized. This is driven by the Google Android GKI initiative I
     think.

   - Open drain support for pins on the Qualcomm IPQ4019.

   - The Ingenic driver can handle both edges IRQ detection.

   - A big slew of documentation fixes all over the place.

   - A few irqchip template conversions by yours truly.

* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
  pinctrl: stmfx: Use irqchip template
  pinctrl: amd: Use irqchip template
  pinctrl: mediatek: fix build for tristate changes
  pinctrl: samsung: Use bank name as irqchip name
  pinctrl: core: print gpio in pins debugfs file
  pinctrl: mediatek: add mt6779 eint support
  pinctrl: mediatek: add pinctrl support for MT6779 SoC
  pinctrl: mediatek: avoid virtual gpio trying to set reg
  pinctrl: mediatek: update pinmux definitions for mt6779
  pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
  pinctrl: mcp23s08: Use irqchip template
  pinctrl: sx150x: Use irqchip template
  dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
  pinctrl: intel: Add Intel Emmitsburg pin controller support
  pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
  Revert "gpio: omap: handle pin config bias flags"
  pinctrl: single: Use fallthrough pseudo-keyword
  pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
  pinctrl: baytrail: Use fallthrough pseudo-keyword
  ...
</content>
</entry>
<entry>
<title>pinctrl: mediatek: update pinmux definitions for mt6779</title>
<updated>2020-07-23T13:22:09Z</updated>
<author>
<name>Hanks Chen</name>
<email>hanks.chen@mediatek.com</email>
</author>
<published>2020-07-23T11:19:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b07b616214857c9db01e2807cde2f6bba8019fc3'/>
<id>urn:sha1:b07b616214857c9db01e2807cde2f6bba8019fc3</id>
<content type='text'>
Add devicetree bindings for Mediatek mt6779 SoC Pin Controller.

Signed-off-by: Mars Cheng &lt;mars.cheng@mediatek.com&gt;
Signed-off-by: Andy Teng &lt;andy.teng@mediatek.com&gt;
Signed-off-by: Hanks Chen &lt;hanks.chen@mediatek.com&gt;
Acked-by: Sean Wang &lt;sean.wang@kernel.org&gt;
Link: https://lore.kernel.org/r/1595503197-15246-2-git-send-email-hanks.chen@mediatek.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones</title>
<updated>2020-07-17T07:23:48Z</updated>
<author>
<name>Alexander A. Klimov</name>
<email>grandmaster@al2klimov.de</email>
</author>
<published>2020-07-13T10:14:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=303d6f62eb8f30516eed01c3faff188f4780de67'/>
<id>urn:sha1:303d6f62eb8f30516eed01c3faff188f4780de67</id>
<content type='text'>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov &lt;grandmaster@al2klimov.de&gt;
Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2</title>
<updated>2020-07-07T10:58:20Z</updated>
<author>
<name>Drew Fustini</name>
<email>drew@beagleboard.org</email>
</author>
<published>2020-07-01T01:33:20Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=27c90e5e48d008bfda1cf6108eb699697317c67b'/>
<id>urn:sha1:27c90e5e48d008bfda1cf6108eb699697317c67b</id>
<content type='text'>
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.

Signed-off-by: Drew Fustini &lt;drew@beagleboard.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2020-06-07T23:13:43Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-06-07T23:13:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cf0c97f148e9e50aa5a7ddd1984a604dd2bde4af'/>
<id>urn:sha1:cf0c97f148e9e50aa5a7ddd1984a604dd2bde4af</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.8 kernel cycle.

  It's just really boring this time. Zero core changes. Just linear
  development, cleanups and misc noncritical fixes. Some new drivers for
  very new Qualcomm and Intel chips.

  New drivers:

   - Intel Jasper Lake support.

   - NXP Freescale i.MX8DXL support.

   - Qualcomm SM8250 support.

   - Renesas R8A7742 SH-PFC support.

  Driver improvements:

   - Severe cleanup and modernization of the MCP23s08 driver.

   - Mediatek driver modularized.

   - Setting config supported in the Meson driver.

   - Wakeup support for the Broadcom BCM7211"

* tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: sprd: Fix the incorrect pull-up definition
  pinctrl: pxa: pxa2xx: Remove 'pxa2xx_pinctrl_exit()' which is unused and broken
  pinctrl: freescale: imx: Use 'devm_of_iomap()' to avoid a resource leak in case of error in 'imx_pinctrl_probe()'
  pinctrl: freescale: imx: Fix an error handling path in 'imx_pinctrl_probe()'
  pinctrl: sirf: add missing put_device() call in sirfsoc_gpio_probe()
  pinctrl: imxl: Fix an error handling path in 'imx1_pinctrl_core_probe()'
  pinctrl: bcm2835: Add support for wake-up interrupts
  pinctrl: bcm2835: Match BCM7211 compatible string
  dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
  dt-bindings: pinctrl: Document 7211 compatible for brcm, bcm2835-gpio.txt
  dt-bindings: pinctrl: stm32: Add missing interrupts property
  pinctrl: at91-pio4: Add COMPILE_TEST support
  pinctrl: Fix return value about devm_platform_ioremap_resource()
  MAINTAINERS: Renesas Pin Controllers are supported
  dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support
  pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
  pinctrl: ocelot: Remove instance number from pin functions
  pinctrl: ocelot: Always register GPIO driver
  dt-bindings: pinctrl: rockchip: update example
  pinctrl: amd: Add ACPI dependency
  ...
</content>
</entry>
<entry>
<title>include: dt-bindings: rockchip: remove unused defines</title>
<updated>2020-05-18T21:39:31Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2020-05-12T20:35:24Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d09855bdd8c4d4eb6e58b8546318ebb5859a513c'/>
<id>urn:sha1:d09855bdd8c4d4eb6e58b8546318ebb5859a513c</id>
<content type='text'>
The Rockchip dtsi and dts files have been bulk-converted for the
remaining raw gpio numbers into their descriptive counterparts and
also got rid of the unhelpful RK_FUNC_x -&gt; x and RK_GPIOx -&gt; x
mappings, so remove the unused defines in 'rockchip.h' to prevent
that someone start using them again.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: https://lore.kernel.org/r/20200512203524.7317-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx: Add imx8dxl driver</title>
<updated>2020-04-16T12:21:22Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2020-03-27T10:55:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f9a8744dde48f368768b3a6de389b7ec2751d192'/>
<id>urn:sha1:f9a8744dde48f368768b3a6de389b7ec2751d192</id>
<content type='text'>
i.MX8DXL contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
