kernel/include/dt-bindings/pinctrl, branch linux-4.1.y

ARM: dts: Fix omap3 off mode pull defines

2017-12-07T02:20:10Z

[ Upstream commit d97556c8012015901a3ce77f46960078139cd79d ] We need to also have OFFPULLUDENABLE bit set to use the off mode pull values. Otherwise the line is pulled down internally if no external pull exists. This is has some documentation at: http://processors.wiki.ti.com/index.php/Optimizing_OMAP35x_and_AM/DM37x_OFF_mode_PAD_configuration Note that the value is still glitchy during off mode transitions as documented in spz319f.pdf "Advisory 1.45". It's best to use external pulls instead of relying on the internal ones for off mode and even then anything pulled up will get driven down momentarily on off mode restore for GPIO banks other than bank1. Signed-off-by: Tony Lindgren Signed-off-by: Sasha Levin

Merge tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2015-04-15T00:58:15Z

Pull pincontrol updates from Linus Walleij: "This is the bulk of pin control changes for the v4.1 development cycle. Nothing really exciting this time: we basically added a few new drivers and subdrivers and stabilized them in linux-next. Some cleanups too. With sunrisepoint Intel has a real fine fully featured pin control driver for contemporary hardware, and the AMD driver is also for large deployments. Most of the others are ARM devices. New drivers: - Intel Sunrisepoint - AMD KERNCZ GPIO - Broadcom Cygnus IOMUX New subdrivers: - Marvell MVEBU Armada 39x SoCs - Samsung Exynos 5433 - nVidia Tegra 210 - Mediatek MT8135 - Mediatek MT8173 - AMLogic Meson8b - Qualcomm PM8916 On top of this cleanups and development history for the above drivers as issues were fixed after merging" * tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits) pinctrl: sirf: move sgpio lock into state container pinctrl: Add support for PM8916 GPIO's and MPP's pinctrl: bcm2835: Fix support for threaded level triggered IRQs sh-pfc: r8a7790: add EtherAVB pin groups pinctrl: Document "function" + "pins" pinmux binding pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support pinctrl: fsl: imx: Check for 0 config register pinctrl: Add support for Meson8b documentation: Extend pinctrl docs for Meson8b pinctrl: Cleanup Meson8 driver Fix inconsistent spinlock of AMD GPIO driver which can be recognized by static analysis tool smatch. Declare constant Variables with Sparse's suggestion. pinctrl: at91: convert __raw to endian agnostic IO pinctrl: constify of_device_id array pinctrl: pinconf-generic: add dt node names to error messages pinctrl: pinconf-generic: scan also referenced phandle node pinctrl: mvebu: add suspend/resume support to Armada XP pinctrl driver pinctrl: st: Display pin's function when printing pinctrl debug information pinctrl: st: Show correct pin direction also in GPIO mode pinctrl: st: Supply a GPIO get_direction() call-back pinctrl: st: Move st_get_pio_control() further up the source file ...

pinctrl: Add support for PM8916 GPIO's and MPP's

2015-04-08T15:00:18Z

Add compatible string definitions and supported pin functions. Signed-off-by: Ivan T. Ivanov Acked-by: Bjorn Andersson Signed-off-by: Linus Walleij

pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.

2015-03-18T01:02:14Z

The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs. The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control. This driver include common driver and mt8135 part. The common driver include the pinctrl driver and GPIO driver. The mt8135 part contain its special device data. Signed-off-by: Hongzhou Yang Signed-off-by: Linus Walleij

ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding

2015-03-06T17:21:03Z

According to AM437x TRM, Document SPRUHL7B, Revised December 2014, Section 7.2.1 Pad Control Registers, setting bit 19 of the pad control registers actually sets the SLEWCTRL value to slow rather than fast as the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for completeness. Current users of the macro (i2c, mdio, and uart) are left unmodified as SLEWCTRL_FAST was the macro used and actual desired state. Tested on am437x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach Signed-off-by: Tony Lindgren

ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding

2015-03-06T17:12:56Z

According to AM335x TRM, Document spruh73l, Revised February 2015, Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control registers actually sets the SLEWCTRL value to slow rather than fast as the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for completeness. Current users of the macro (i2c and mdio) are left unmodified as SLEWCTRL_FAST was the macro used and actual desired state. Tested on am335x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach Signed-off-by: Tony Lindgren

Merge tag 'sunxi-dt-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

2015-01-27T04:24:47Z

Merge "Allwinner device tree changes for 3.20" from Maxime Ripard: A lot of changes to the device tree for the 3.20 merge window, mostly with: - More DT license convertions, only two DTS and two DTSI are still uncertain and have not been converted yet - Use the C-preprocessor includes in the device trees. - Add support for the A31s SoC and improve the A80 support - Add IR receiver, lradc, PS/2 support - Add cpufreq support for all SoCs but the A23 and A80. - And a lot of new boards * tag 'sunxi-dt-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (64 commits) ARM: dts: sun5i: Enable axp209 support on A13-OLinuxIno ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options ARM: sunxi: dts: Add PS2 nodes to dtsi for A10,A20 ARM: dts: sun6i: Add resistive touchscreen controller node to dtsi ARM: dts: sun4i: Add Hyundau A7HD board ARM: dts: sun4i: Add Marsboard A10 board ARM: dts: sun9i: Enable mmc2 on A80 Optimus Board ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2 ARM: dts: sun9i: Enable mmc0 on A80 Optimus Board ARM: dts: sun9i: Convert a80 optimus board dts to label referencing ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi ARM: dts: sun9i: Add mmc config clock nodes ARM: dts: sunxi: Add missing mdio label ARM: dts: sun5i: Add mk802_a10s board ARM: dts: sun4i: Add mk802ii board ARM: dts: sun4i: Add mk802 board ARM: dts: sun4i: Add dts file for Chuwi V7 CW0825 tablet ARM: dts: sun7i: Add dts file for Bananapro board ARM: sun6i: Enable ARM arch timers ARM: dts: sun6i: Convert hummingbird a31 dts to label references ... Signed-off-by: Olof Johansson

ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes

2015-01-21T08:58:57Z

The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard

ARM: dts: Add minimal support for dm8168-evm

2015-01-19T19:47:35Z

This allows booting the device with basic functionality. Note that at least on my revision c board the DDR3 does not seem to work properly and only some of the memory can be reliably used. Also, the mainline u-boot does not seem to properly initialize the ethernet, so I've been using the old TI u-boot at: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary Cc: Brian Hutchinson Signed-off-by: Tony Lindgren

Merge tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2014-12-11T18:43:14Z

Pull pin control changes from Linus Walleij: "Here is a stash of pin control changes I have collected for the v3.19 series. Mainly new hardware support, with Intels new embedded SoC as the especially interesting thing standing out, fully using the subsystem. - Force conversion of the ux500 pin control device trees and parsers to use the generic pin control bindings. - New driver and device tree bindings for the Qualcomm PMIC MPP pin controller and GPIO. - Some ACPI infrastructure for pin controllers. - New driver for the Intel CherryView/Braswell pin controller, the first Intel pin controller to fully take advantage of the pin control subsystem. - Support the Freescale i.MX VF610 variant. - Support the sunxi A80 variant. - Support the Samsung Exynos 4415 and Exynos 7 variants. - Split out Intel pin controllers to their own subdirectory. - A large slew of rockchip pin control updates, including suspend/resume support. - A large slew of Samsung Exynos pin controller updates. - Various minor updates and fixes" * tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (49 commits) pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show pinctrl: meson: add device tree bindings documentation gpio: tz1090: Fix error handling of irq_of_parse_and_map pinctrl: tz1090-pinctrl.txt: Fix typo in binding pinctrl: pinconf-generic: Declare dt_params/conf_items const pinctrl: exynos: Add support for Exynos4415 pinctrl: exynos: Add initial driver data for Exynos7 pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts pinctrl: exynos: Consolidate irq domain callbacks pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: samsung: Separate per-bank init and runtime data pinctrl: samsung: Constify samsung_pin_ctrl struct pinctrl: samsung: Constify samsung_pin_bank_type struct pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR() pinctrl: Add Intel Cherryview/Braswell pin controller support gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod() pinctrl: Fix path error in documentation pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume pinctrl: rockchip: add suspend/resume functions ...