<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/dt-bindings/gpio, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2015-04-07T09:44:40Z</updated>
<entry>
<title>pinctrl: Add support for Meson8b</title>
<updated>2015-04-07T09:44:40Z</updated>
<author>
<name>Carlo Caione</name>
<email>carlo@endlessm.com</email>
</author>
<published>2015-03-29T10:56:42Z</published>
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<id>urn:sha1:0fefcb6876d0d650ac2255c57051b31c48c1b165</id>
<content type='text'>
This patch adds support for the AmLogic Meson8b SoC.

Signed-off-by: Carlo Caione &lt;carlo@endlessm.com&gt;
Acked-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: add driver for Amlogic Meson SoCs</title>
<updated>2015-01-26T08:13:00Z</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2015-01-17T18:15:14Z</published>
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<id>urn:sha1:6ac730951104a437bf828683bcf9ba66336c4fa7</id>
<content type='text'>
This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add port FF to GPIO IDs</title>
<updated>2013-12-16T21:09:16Z</updated>
<author>
<name>Ashwini Ghuge</name>
<email>aghuge@nvidia.com</email>
</author>
<published>2013-11-18T13:10:41Z</published>
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<id>urn:sha1:18f48a4f1d49d522285b5a9f3c5d984f4fdaae01</id>
<content type='text'>
NVIDIA Tegra124 supports has the new GPIO port as GPIO_FF.
Add the macro for this port name.

Signed-off-by: Ashwini Ghuge &lt;aghuge@nvidia.com&gt;
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: create a DT header defining GPIO IDs</title>
<updated>2013-05-28T22:13:49Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-02-13T00:24:04Z</published>
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<id>urn:sha1:9798e47ff232c48b3c25b9a6b9395b505e389475</id>
<content type='text'>
All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: dt: add header to define GPIO flags</title>
<updated>2013-04-05T18:23:14Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-02-13T00:22:36Z</published>
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<id>urn:sha1:71fab21fee07fd6d5f1a984db387cc5e4596f3fa</id>
<content type='text'>
Many GPIO device tree bindings use the same flags. Create a header to
define those.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
</content>
</entry>
</feed>
