<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/dt-bindings/clock, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
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<updated>2018-04-24T07:43:05Z</updated>
<entry>
<title>dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4</title>
<updated>2018-04-24T07:43:05Z</updated>
<author>
<name>Sean Wang</name>
<email>sean.wang@mediatek.com</email>
</author>
<published>2018-03-01T03:27:50Z</published>
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<id>urn:sha1:525398643e51065ae209f17884bd0d695b6cb59b</id>
<content type='text'>
commit 55a5fcafe3a94e8a0777bb993d09107d362258d2 upstream.

Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.

Cc: stable@vger.kernel.org
Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
Signed-off-by: Sean Wang &lt;sean.wang@mediatek.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Merge tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips</title>
<updated>2018-02-07T19:22:44Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-02-07T19:22:44Z</published>
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<id>urn:sha1:8578953687393945ccb84488973784b9a745b059</id>
<content type='text'>
Pull MIPS updates from James Hogan:
 "These are the main MIPS changes for 4.16.

  Rough overview:

   (1) Basic support for the Ingenic JZ4770 based GCW Zero open-source
       handheld video game console

   (2) Support for the Ranchu board (used by Android emulator)

   (3) Various cleanups and misc improvements

  More detailed summary:

  Fixes:
   - Fix generic platform's USB_*HCI_BIG_ENDIAN selects (4.9)
   - Fix vmlinuz default build when ZBOOT selected
   - Fix clean up of vmlinuz targets
   - Fix command line duplication (in preparation for Ingenic JZ4770)

  Miscellaneous:
   - Allow Processor ID reads to be to be optimised away by the compiler
     (improves performance when running in guest)
   - Push ARCH_MIGHT_HAVE_PC_SERIO/PARPORT down to platform level to
     disable on generic platform with Ranchu board support
   - Add helpers for assembler macro instructions for older assemblers
   - Use assembler macro instructions to support VZ, XPA &amp; MSA
     operations on older assemblers, removing C wrapper duplication
   - Various improvements to VZ &amp; XPA assembly wrappers
   - Add drivers/platform/mips/ to MIPS MAINTAINERS entry

  Minor cleanups:
   - Misc FPU emulation cleanups (removal of unnecessary include, moving
     macros to common header, checkpatch and sparse fixes)
   - Remove duplicate assignment of core in play_dead()
   - Remove duplication in watchpoint handling
   - Remove mips_dma_mapping_error() stub
   - Use NULL instead of 0 in prepare_ftrace_return()
   - Use proper kernel-doc Return keyword for
     __compute_return_epc_for_insn()
   - Remove duplicate semicolon in csum_fold()

  Platform support:

  Broadcom:
   - Enable ZBOOT on BCM47xx

  Generic platform:
   - Add Ranchu board support, used by Android emulator
   - Fix machine compatible string matching for Ranchu
   - Support GIC in EIC mode

  Ingenic platforms:
   - Add DT, defconfig and other support for JZ4770 SoC and GCW Zero
   - Support dynamnic machine types (i.e. JZ4740 / JZ4770 / JZ4780)
   - Add Ingenic JZ4770 CGU clocks
   - General Ingenic clk changes to prepare for JZ4770 SoC support
   - Use common command line handling code
   - Add DT vendor prefix to GCW (Game Consoles Worldwide)

  Loongson:
   - Add MAINTAINERS entry for Loongson2 and Loongson3 platforms
   - Drop 32-bit support for Loongson 2E/2F devices
   - Fix build failures due to multiple use of 'MEM_RESERVED'"

* tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (53 commits)
  MIPS: Malta: Sanitize mouse and keyboard configuration.
  MIPS: Update defconfigs after previous patch.
  MIPS: Push ARCH_MIGHT_HAVE_PC_SERIO down to platform level
  MIPS: Push ARCH_MIGHT_HAVE_PC_PARPORT down to platform level
  MIPS: SMP-CPS: Remove duplicate assignment of core in play_dead
  MIPS: Generic: Support GIC in EIC mode
  MIPS: generic: Fix Makefile alignment
  MIPS: generic: Fix ranchu_of_match[] termination
  MIPS: generic: Fix machine compatible matching
  MIPS: Loongson fix name confict - MEM_RESERVED
  MIPS: bcm47xx: enable ZBOOT support
  MIPS: Fix trailing semicolon
  MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers
  MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.
  MIPS: MSA: Update helpers to use new asm macros
  MIPS: XPA: Standardise readx/writex accessors
  MIPS: XPA: Allow use of $0 (zero) to MTHC0
  MIPS: XPA: Use XPA instructions in assembly
  MIPS: VZ: Pass GC0 register names in $n format
  MIPS: VZ: Update helpers to use new asm macros
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next</title>
<updated>2018-01-27T00:43:39Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:43:39Z</published>
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<id>urn:sha1:c43a52cfd27b20292d19d924eddfa5ff8dce87e5</id>
<content type='text'>
* clk-aspeed:
  clk: aspeed: Handle inverse polarity of USB port 1 clock gate
  clk: aspeed: Fix return value check in aspeed_cc_init()
  clk: aspeed: Add reset controller
  clk: aspeed: Register gated clocks
  clk: aspeed: Add platform driver and register PLLs
  clk: aspeed: Register core clocks
  clk: Add clock driver for ASPEED BMC SoCs
  dt-bindings: clock: Add ASPEED constants

* clk-lock-UP:
  clk: fix reentrancy of clk_enable() on UP systems

* clk-mediatek:
  clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built
  clk: mediatek: Fix all warnings for missing struct clk_onecell_data
  clk: mediatek: fixup test-building of MediaTek clock drivers
  clk: mediatek: group drivers under indpendent menu

* clk-allwinner:
  clk: sunxi-ng: a83t: Add M divider to TCON1 clock
  clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU
  clk: sunxi-ng: add support for Allwinner H3 DE2 CCU
  dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3
  clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL
  clk: sunxi-ng: Support fixed post-dividers on NM style clocks
  clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks
  clk: sunxi-ng: Support fixed post-dividers on MP style clocks
  clk: sunxi: Use PTR_ERR_OR_ZERO()
</content>
</entry>
<entry>
<title>Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' and 'clk-meson' into clk-next</title>
<updated>2018-01-27T00:43:32Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:43:32Z</published>
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<id>urn:sha1:4d1d13a5ae8d468923106d5b05de407bc25cefa2</id>
<content type='text'>
* clk-remove-asm-clkdev:
  clk: Move __clk_{get,put}() into private clk.h API
  clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks
  arch: Remove clkdev.h asm-generic from Kbuild
  clk: Prepare to remove asm-generic/clkdev.h
  blackfin: Use generic clkdev.h header

* clk-debugfs-fixes:
  clk: Simplify debugfs registration
  clk: Fix debugfs_create_*() usage
  clk: Show symbolic clock flags in debugfs
  clk: Improve flags doc for of_clk_detect_critical()

* clk-renesas:
  clk: renesas: r8a7796: Add FDP clock
  clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend
  clk: renesas: mstp: Keep wakeup sources active during system suspend
  clk: renesas: r8a77970: Add LVDS clock

* clk-meson:
  clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
  clk: meson-axg: make local symbol axg_gp0_params_table static
  clk: meson-axg: fix return value check in axg_clkc_probe()
  clk: meson: mpll: use 64-bit maths in params_from_rate
  clk: meson-axg: add clock controller drivers
  clk: meson-axg: add clocks dt-bindings required header
  dt-bindings: clock: add compatible variant for the Meson-AXG
  clk: meson: make the spinlock naming more specific
  clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
  clk: meson: gxbb: fix wrong clock for SARADC/SANA
</content>
</entry>
<entry>
<title>Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next</title>
<updated>2018-01-27T00:41:47Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:41:47Z</published>
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<id>urn:sha1:21170e3bda0e425d7301f27e6bee7e84cfbfa519</id>
<content type='text'>
* clk-spreadtrum:
  clk: sprd: add clocks support for SC9860
  clk: sprd: Add dt-bindings include file for SC9860
  dt-bindings: Add Spreadtrum clock binding documentation
  clk: sprd: add adjustable pll support
  clk: sprd: add composite clock support
  clk: sprd: add divider clock support
  clk: sprd: add mux clock support
  clk: sprd: add gate clock support
  clk: sprd: Add common infrastructure
  clk: move clock common macros out from vendor directories

* clk-mvebu-dvfs:
  clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
  clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
  clk: mvebu: armada-37xx-periph: cosmetic changes

* clk-qoriq:
  clk: qoriq: add more divider clocks support

* clk-imx:
  clk: imx51: uart4, uart5 gates only exist on imx50, imx53

* clk-qcom-ipq8074:
  clk: qcom: ipq8074: add misc resets for PCIE and NSS
  dt-bindings: clock: qcom: add misc resets for PCIE and NSS
  clk: qcom: ipq8074: add GP and Crypto clocks
  clk: qcom: ipq8074: add NSS ethernet port clocks
  clk: qcom: ipq8074: add NSS clocks
  clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
  clk: qcom: ipq8074: add remaining PLL’s
  dt-bindings: clock: qcom: add remaining clocks for IPQ8074
  clk: qcom: ipq8074: fix missing GPLL0 divider width
  clk: qcom: add parent map for regmap mux
  clk: qcom: add read-only divider operations
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add jz4770-cgu.h header</title>
<updated>2018-01-18T22:05:42Z</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2018-01-16T15:47:55Z</published>
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<id>urn:sha1:b28a4b8eb9f515e76699251d0a3f834be9b14223</id>
<content type='text'>
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4770-cgu driver.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18481/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: add misc resets for PCIE and NSS</title>
<updated>2017-12-22T00:03:38Z</updated>
<author>
<name>Abhishek Sahu</name>
<email>absahu@codeaurora.org</email>
</author>
<published>2017-12-13T14:25:41Z</published>
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<id>urn:sha1:e1f34e4f27bb85fac783587ff869af3e46a09bb7</id>
<content type='text'>
PCIE and NSS has MISC reset register in which single register has
multiple reset bit. The patch adds the DT bindings for these MISC
resets.

Signed-off-by: Abhishek Sahu &lt;absahu@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: add remaining clocks for IPQ8074</title>
<updated>2017-12-22T00:03:28Z</updated>
<author>
<name>Abhishek Sahu</name>
<email>absahu@codeaurora.org</email>
</author>
<published>2017-12-13T14:25:35Z</published>
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<id>urn:sha1:8c1c2c5a9656ff17dc91da0a1dbe075fb912ba9b</id>
<content type='text'>
This patch adds the DT bindings for following IPQ8074 clocks

 - General PLL’s, NSS UBI PLL and NSS Crypto PLL.
 - 2 instances of PCIE, USB, SDCC.
 - 2 NSS UBI core and common NSS clocks. NSS is network switching
   system which accelerates the ethernet traffic. IPQ8074
   NSS has two UBI cores. Some clocks are separate for each UBI core
   and remaining NSS clocks are common.
 - NSS ethernet port clocks. IPQ8074 has 6 ethernet ports and
   each port uses different TX and RX clocks.
 - Crypto engine clocks.
 - General purpose clocks which comes over GPIO.

Signed-off-by: Abhishek Sahu &lt;absahu@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: Add dt-bindings include file for SC9860</title>
<updated>2017-12-21T23:00:54Z</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:12Z</published>
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<id>urn:sha1:bf4439452b156574698560bb7ace8895a314bd06</id>
<content type='text'>
This file defines all SC9860 clock indexes, it should be included in the
device tree in which there's device using the clocks.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add ASPEED constants</title>
<updated>2017-12-21T03:33:04Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-12-11T04:54:37Z</published>
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<id>urn:sha1:70dad67ab1af7766ed046281eaed26d48a26916e</id>
<content type='text'>
These will be used by the clock driver and device trees.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
</feed>
