<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/dt-bindings/clock/tegra234-clock.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
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<updated>2022-11-21T12:27:17Z</updated>
<entry>
<title>dt-bindings: tegra: Update headers for Tegra234</title>
<updated>2022-11-21T12:27:17Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2022-10-03T12:51:41Z</published>
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<id>urn:sha1:41155b6f6db8742c5f5247a141eca89c601c258c</id>
<content type='text'>
Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add headers for NVDEC on Tegra234</title>
<updated>2022-10-24T12:53:35Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-09-20T08:11:57Z</published>
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<id>urn:sha1:0e2b014eeb257173c72014ebd02ab0d60643f0f8</id>
<content type='text'>
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add headers for Host1x and VIC on Tegra234</title>
<updated>2022-07-08T14:17:04Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:19:57Z</published>
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<id>urn:sha1:63a6ef2360bdeffcdd41bcdd86937b6db17b573d</id>
<content type='text'>
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add Tegra234 MGBE clocks and resets</title>
<updated>2022-07-08T08:20:59Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-07-06T03:12:52Z</published>
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<id>urn:sha1:b0aedf342bc31d7b8e9a782cd8b439db07fbdc78</id>
<content type='text'>
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Bhadram Varka &lt;vbhadram@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>arm64: tegra: Add QSPI controllers on Tegra234</title>
<updated>2022-04-06T13:27:17Z</updated>
<author>
<name>Ashish Singhal</name>
<email>ashishsingha@nvidia.com</email>
</author>
<published>2022-03-08T18:30:26Z</published>
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<id>urn:sha1:71f69ffa0129bf04205edf0e7dc73dc4777b2588</id>
<content type='text'>
This adds the QSPI controllers on the Tegra234 SoC and populates the
SPI NOR flash device for the Jetson AGX Orin platform.

Signed-off-by: Ashish Singhal &lt;ashishsingha@nvidia.com&gt;
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Krishna Yarlagadda &lt;kyarlagadda@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add Tegra234 PCIe clocks and resets</title>
<updated>2022-02-24T18:56:16Z</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2022-02-05T16:21:35Z</published>
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<id>urn:sha1:d06a171e07bc6aa524b402c754611ef08a34b131</id>
<content type='text'>
Add the clocks and resets used by the PCIe hardware found on
Tegra234 SoCs.

Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add HDA support for Tegra234</title>
<updated>2022-02-24T17:34:33Z</updated>
<author>
<name>Mohan Kumar</name>
<email>mkumard@nvidia.com</email>
</author>
<published>2022-02-16T09:22:38Z</published>
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<id>urn:sha1:07d743902a1205d54d93c0637c22575811014431</id>
<content type='text'>
Add hda clocks, memory ,power and reset binding entries
for Tegra234.

Signed-off-by: Mohan Kumar &lt;mkumard@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add Tegra234 APE support</title>
<updated>2022-02-17T14:21:43Z</updated>
<author>
<name>Sameer Pujar</name>
<email>spujar@nvidia.com</email>
</author>
<published>2022-01-27T07:27:32Z</published>
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<id>urn:sha1:40efe139ff605d80cc829ddf8c50c71d20399bf8</id>
<content type='text'>
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.

Signed-off-by: Sameer Pujar &lt;spujar@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add headers for Tegra234 PWM</title>
<updated>2022-02-03T17:43:17Z</updated>
<author>
<name>Akhil R</name>
<email>akhilrajeev@nvidia.com</email>
</author>
<published>2022-01-24T11:18:16Z</published>
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<id>urn:sha1:38eb21a5fcd2ae482c8377ccb75c265037ef538f</id>
<content type='text'>
Add dt-bindings header files for PWM of Tegra234

Signed-off-by: Akhil R &lt;akhilrajeev@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add headers for Tegra234 I2C</title>
<updated>2022-02-03T17:43:00Z</updated>
<author>
<name>Akhil R</name>
<email>akhilrajeev@nvidia.com</email>
</author>
<published>2022-01-24T11:18:14Z</published>
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<id>urn:sha1:bb747becf8084ebbbb8986f7927057034d5c3329</id>
<content type='text'>
Add dt-bindings header files for I2C controllers for Tegra234

Signed-off-by: Akhil R &lt;akhilrajeev@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
