kernel/include/dt-bindings/clock/stratix10-clock.h, branch linux-6.2.y

dt-bindings: clk: cleanup comments

2022-03-10T23:22:25Z

For spdx, first line /* */ for *.h, change tab to space Replacements devider to divider Comunications to Communications periphrals to peripherals supportted to supported wich to which Documentatoin to Documentation Signed-off-by: Tom Rix Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com

clk: socfpga: stratix10: add additional clocks needed for the NAND IP

2019-06-25T21:36:56Z

The nand_clk is actually called the nand_x_clk and the parent is the l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the nand_x_clk and has a fixed divider of 4. The same is true for the nand_ecc_clk. Signed-off-by: Dinh Nguyen Signed-off-by: Stephen Boyd

dt-bindings: documentation: add clock bindings information for Stratix10

2018-04-06T16:54:59Z

Document that Stratix10 clock bindings, and add the clock header file. The clock header is an enumeration of all the different clocks on the Stratix10 platform. Signed-off-by: Dinh Nguyen Reviewed-by: Rob Herring Signed-off-by: Stephen Boyd