kernel/include/dt-bindings/clock/mt8173-clk.h, branch linux-5.11.y

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174

2019-05-30T18:26:41Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Kate Stewart Reviewed-by: Richard Fontana Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman

clk: mediatek: correct cpu clock name for MT8173 SoC

2019-02-26T18:17:40Z

Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72. Signed-off-by: Seiya Wang Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

clk: mediatek: export cpu multiplexer clock for MT8173 SoCs

2017-06-20T02:02:44Z

The patch enables CPU multiplexer clock on MT8173 SoC which fixes up cpufreq driver fails at acquiring intermediate clock source when driver probe is called. Signed-off-by: Pi-Cheng Chen Signed-off-by: Sean Wang Signed-off-by: Stephen Boyd

clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

2016-05-06T15:47:40Z

The configurable hdmi_ref output of the PLL block is derived from the tvdpll_594m clock signal via a configurable PLL post-divider. It is used as the PLL reference input to the HDMI PHY module. Signed-off-by: Philipp Zabel Acked-by: James Liao Acked-by: Stephen Boyd

clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS

2015-10-01T04:06:00Z

Add REF2USB_TX clock support into MT8173 APMIXEDSYS. This clock is needed by USB 3.0. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz

clk: mediatek: Add subsystem clocks of MT8173

2015-10-01T04:04:50Z

Most multimedia subsystem clocks will be accessed by multiple drivers, so it's a better way to manage these clocks in CCF. This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT subsystems. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz

clk: mediatek: Removed unused dpi_ck clock from MT8173

2015-10-01T04:04:48Z

The dpi_ck clock can be removed because it not actually used in topckgen and subsystems. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz

clk: mediatek: add 13mhz clock for MT8173

2015-10-01T04:04:34Z

Add 13mhz clock used by GPT timer in infracfg. Signed-off-by: Yingjoe Chen Acked-by: Stephen Boyd Signed-off-by: James Liao

clk: mediatek: Add basic clocks for Mediatek MT8173.

2015-05-06T05:50:38Z

This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs, INFRA and PERI clocks. Signed-off-by: James Liao Signed-off-by: Henry Chen Signed-off-by: Sascha Hauer Signed-off-by: Stephen Boyd