kernel/include/dt-bindings/clock/imx8mq-clock.h, branch linux-5.11.y

clk: imx: imx8mq: fix a53 cpu clock

2020-02-24T07:39:56Z

The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root signoff timing is 1Ghz, however the A53 core which sources from CCM root could run above 1GHz which violates the CCM. There is a CORE_SEL slice before A53 core, we need to configure the CORE_SEL slice source from ARM PLL, not A53 CCM clk root. The A53 CCM clk root should only be used when need to change ARM PLL frequency. Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out. Configure a53 ccm root sources from 800MHz sys pll Configure a53 core sources from arm_pll_out Mark arm_a53_core as critical clock Fixes: db27e40b27f1 ("clk: imx8mq: Add the missing ARM clock") Reviewed-by: Jacky Bai Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

clk: imx: imx8mq: use imx8m_clk_hw_composite_core

2020-02-14T02:49:35Z

Use imx8m_clk_hw_composite_core to simplify code. Add new definitions, and X_SRC/CG/DIV will be alias to the new definitions for backwards compatibility Reviewed-by: Abel Vesa Signed-off-by: Peng Fan Reviewed-by: Leonard Crestez Signed-off-by: Shawn Guo

clk: imx8mq: Define gates for pll1/2 fixed dividers

2019-10-25T09:03:00Z

On imx8mq there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate but these gates are not currently defined in the clock tree. Add them between sys1/2_pll_out and the fixed dividers. Signed-off-by: Leonard Crestez Reviewed-by: Abel Vesa Signed-off-by: Shawn Guo

clk: imx8mq: Add VIDEO2_PLL clock

2019-10-14T11:27:23Z

This clock is needed by DCSS when high resolutions are used. Signed-off-by: Laurentiu Palcu CC: Abel Vesa Signed-off-by: Shawn Guo

dt-bindings: clock: imx8m: Add GIC clock

2019-05-23T13:14:40Z

This should be defined in the clock tree so that parents are not shutdown by accident Signed-off-by: Leonard Crestez Reviewed-by: Abel Vesa Signed-off-by: Shawn Guo

dt-bindings: clock: imx8mq: Add SNVS clock

2019-05-22T09:00:52Z

Add macro for the SNVS clock of the i.MX8MQ. Signed-off-by: Anson Huang Reviewed-by: Leonard Crestez Signed-off-by: Shawn Guo

dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps

2019-03-12T20:40:10Z

IMX8MQ_CLK_USB_PHY_REF changes from 163 to 153, this way removing the gap. All the following clock ids are now decreased by 10 to keep the numbering right. Doing this, the IMX8MQ_CLK_CSI2_CORE is not overlapped with IMX8MQ_CLK_GPT1 anymore. IMX8MQ_CLK_GPT1_ROOT changes from 193 to 183 and all the following ids are updated accordingly. Reported-by: Patrick Wildt Fixes: 1cf3817b ("dt-bindings: Add binding for i.MX8MQ CCM") Signed-off-by: Abel Vesa Signed-off-by: Stephen Boyd

clk: imx8mq: add GPIO clocks to clock tree

2019-02-28T18:28:28Z

i.MX8MQ has clock gate for each GPIO bank, add them into clock tree for GPIO driver to manage. Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam Signed-off-by: Stephen Boyd

dt-bindings: imx8mq-clock: Add the missing ARM clock

2019-02-21T20:56:52Z

Add the missing ARM clock which will be used by cpufreq Signed-off-by: Abel Vesa Reviewed-by: Lucas Stach [sboyd@kernel.org: Fixed numbering in dt header] Signed-off-by: Stephen Boyd

clk: imx8mq: Add support for the CLKO1 clock

2019-02-21T20:56:52Z

Add the entry for the CLKO1 clock. Signed-off-by: Fabio Estevam Reviewed-by: Abel Vesa Signed-off-by: Stephen Boyd