clk: imx6: Add SPDIF_GCLK clock in clock tree

2015-10-12T13:55:59Z

Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also one clock of SPDIF, which is missed before. We found an issue that imx can't enter low power mode with spdif if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe, so its parent clock (PLL clock) is prepared, the prepare operation of PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled, then it can enter low power mode. So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock. SPDIF_GCLK's parent clock is ipg clock. Signed-off-by: Shengjiu Wang Signed-off-by: Shawn Guo

ARM: imx6sx: add BYPASS support for PLL clocks

2014-09-16T02:06:49Z

This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS support for PLL clocks" for imx6q. The difference is that only anaclk1 is available on imx6sx. Signed-off-by: Shawn Guo

ARM: imx: add clock driver for imx6sx

2014-05-16T07:35:19Z

Add clock driver for i.MX6 SoloX SoC. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo

kernel/include/dt-bindings/clock/imx6sx-clock.h, branch linux-4.16.y

clk: imx6: Add SPDIF_GCLK clock in clock tree

ARM: imx6sx: add BYPASS support for PLL clocks

ARM: imx: add clock driver for imx6sx