kernel/include/dt-bindings/clock/exynos850.h, branch linux-rolling-stable

dt-bindings: clock: exynos850: Add TMU clock

2024-07-31T14:16:57Z

Add a constant for TMU PCLK clock. It acts simultaneously as an interface clock (to access TMU registers) and an operating clock which makes TMU IP-core functional. Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20240723163311.28654-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1

2024-02-25T15:48:45Z

Document CPU clock management unit compatibles and add corresponding clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks for each cluster, and there are alternate ("switch") clocks that can be used temporarily while re-configuring the PLL for the new rate. ACLK, ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses. CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to change CPU rates. Also some CoreSight clocks can be derived from DBG_USER (debug clock). Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: exynos850: Add PDMA clocks

2024-01-23T12:23:11Z

Add constants for Peripheral DMA (PDMA) clocks in CMU_CORE controller: - PDMA_ACLK: clock for PDMA0 (regular DMA) - SPDMA_ACLK: clock for PDMA1 (secure DMA) Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20240120012948.8836-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: samsung: remove define with number of clocks

2023-08-15T05:50:15Z

Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore these numbers of clocks should not be in the bindings, as that prevents changing them. Remove it entirely from the bindings, once Linux drivers stopped using them. Reviewed-by: Conor Dooley Reviewed-by: Sam Protsenko Reviewed-by: Alim Akhtar Reviewed-by: Chanwoo Choi Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks

2023-03-06T15:53:08Z

Add main gate clocks for controlling AUD and HSI CMUs: - gout_aud_cmu_aud_pclk - gout_hsi_cmu_hsi_pclk While at it, add missing PPMU (Performance Profiling Monitor Unit) clocks for CMU_HSI. Acked-by: Rob Herring Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20230223042133.26551-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D

2023-03-06T15:53:07Z

CMU_G3D generates Gondul GPU and bus clocks for BLK_G3D. Add clock indices and binding documentation for CMU_G3D. Acked-by: Rob Herring Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20230223042133.26551-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL

2022-08-23T06:12:01Z

CMU_MFCMSCL generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL. Add clock indices and binding documentation for CMU_MFCMSCL. Signed-off-by: Sam Protsenko Reviewed-by: Chanwoo Choi Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220809113323.29965-4-semen.protsenko@linaro.org

dt-bindings: clock: exynos850: Add Exynos850 CMU_IS

2022-08-23T06:11:50Z

CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add clock indices and bindings documentation for CMU_IS domain. Signed-off-by: Sam Protsenko Reviewed-by: Chanwoo Choi Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220809113323.29965-3-semen.protsenko@linaro.org

dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD

2022-08-23T06:11:36Z

CMU_AUD generates Cortex-A32 clock, bus clock and audio clocks for BLK_AUD. Add clock indices and binding documentation for CMU_AUD. Signed-off-by: Sam Protsenko Reviewed-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220809113323.29965-2-semen.protsenko@linaro.org

dt-bindings: clock: Add bindings for Exynos850 sysreg clocks

2021-12-19T22:25:28Z

System Register is used to configure system behavior, like USI protocol, etc. SYSREG clocks should be provided to corresponding syscon nodes, to make it possible to modify SYSREG registers. While at it, add also missing PMU and GPIO clocks, which looks necessary and might be needed for corresponding Exynos850 features soon. Signed-off-by: Sam Protsenko Signed-off-by: Sylwester Nawrocki Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring Acked-by: Chanwoo Choi Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org