kernel/include/dt-bindings/clock/exynos4.h, branch linux-4.16.y

clk: samsung: Add dt bindings for Exynos4412 ISP clock controller

2017-10-16T09:25:35Z

Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Sylwester Nawrocki

clk: samsung: exynos4: Add SSS gate clock

2015-11-18T13:02:02Z

Add a gate clock for controlling all clocks of Security Sub System (SSS). Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd

clk: samsung: exynos4: Add divider clock id for memory bus frequency

2015-01-28T14:51:17Z

This patch adds the divider clock id for Exynos4 memory bus frequency. The clock id is used for DVFS (Dynamic Voltage/Frequency Scaling) feature of the exynos memory bus. Signed-off-by: Chanwoo Choi Acked-by: MyungJoo Ham Signed-off-by: Sylwester Nawrocki

clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks

2014-09-22T12:31:14Z

This patch adds support for exporting mout_hdmi and mout_mixer to device tree. Access to those clocks is required to correctly setup HDMI module on Exynos 4210 and 4x12 SoCs. Signed-off-by: Marek Szyprowski CC: Mike Turquette CC: Tomasz Figa Signed-off-by: Tomasz Figa

clk: samsung: exynos4: add missing smmu_g2d clock and update comments

2014-09-22T12:31:06Z

This patch adds missing smmu_g2d clock implementation and updates comment about Exynos4 clocks from 278-282 range. Those clocks are available on all Exynos4 SoC series, so the misleading comment has been removed. Signed-off-by: Marek Szyprowski Signed-off-by: Tomasz Figa

clk: samsung: trivial: Correct typo in author's name

2014-07-26T00:57:20Z

This patch corrects mistyped author's name in four header files. While at it, a copy/paste error in author's e-mail in one of the headers is also fixed. Signed-off-by: Tomasz Figa

clk: samsung: exynos4: Add CLKOUT clock hierarchy

2014-07-26T00:47:10Z

This patch adds definitions of clocks that are used to drive clock output signals of particular CMU sub-blocks that are then fed to PMU and handled by Exynos CLKOUT driver added in further patch. Signed-off-by: Tomasz Figa

clk: exynos4: Add PPMU IP block source clocks.

2014-06-30T13:07:56Z

Exynos4 has saveral PPMUs and each of them has operation clock which can be gated through CMU's SFR control. New clocks are listed below. All clocks are added as a gate-typed clock. CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV, CLK_PPMUMFC_L, CLK_PPMUMFC_R, CLK_G3D, CLK_PPMUIMAGE, CLK_PPMULCD0, CLK_PPMULCD1, CLK_PPMUFILE, CLK_PPMUGPS, CLK_PPMUDMC0, CLK_PPMUDMC1, CLK_PPMUCPU, CLK_PPMUACP, Signed-off-by: Jonghwa Lee Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham Signed-off-by: Tomasz Figa

clk: samsung: exynos4: export sclk_hdmiphy clock

2014-05-14T17:40:15Z

Export sclk_hdmiphy clock to be usable from DT. Signed-off-by: Tomasz Stanislawski Signed-off-by: Tomasz Figa

clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks

2014-05-14T17:40:14Z

Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock defined exactly in same way in documentation. Using different names for these clocks is a bit misleading. Since there is no users of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA has correct clock assigned on Exynos4x12 SoCs. Suggested-by: Tomasz Figa Signed-off-by: Sylwester Nawrocki Acked-by: Kyungmin Park Signed-off-by: Tomasz Figa