kernel/include/dt-bindings/clock/dra7.h, branch linux-5.11.y

clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks

2020-11-19T13:09:00Z

Similar to what we've done for IPU and DSP let's ignore the status bit for the IVA clkctrl register. The clkctrl status won't change unless the related rstctrl is deasserted, and the rstctrl status won't change unless the clkctrl is enabled. Cc: linux-clk@vger.kernel.org Cc: Michael Turquette Cc: Stephen Boyd Cc: Suman Anna Cc: Tero Kristo Signed-off-by: Tony Lindgren

clk: ti: dra7: add missing clkctrl register for SHA2 instance

2020-09-22T20:00:07Z

DRA7 SoC has two SHA instances. Add the clkctrl entry for the second one. Signed-off-by: Tero Kristo Link: https://lore.kernel.org/r/20200907082600.454-4-t-kristo@ti.com Signed-off-by: Stephen Boyd

clk: ti: add clkctrl data dra7 sgx

2020-01-20T07:43:44Z

This is similar to what we have for omap5 except the gpu_cm address is different, the mux clocks have one more source option, and there's no divider clock. Note that because of the current dts node name dependency for mapping to clock domain, we must still use "gpu-clkctrl@" naming instead of generic "clock@" naming for the node. And because of this, it's probably best to apply the dts node addition together along with the other clock changes. For accessing the GPU, we also need to configure the interconnect target module for GPU similar to what we have for omap5, I'll send that change separately. Cc: Benoit Parrot Cc: "H. Nikolaus Schaller" Cc: Robert Nelson Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren Acked-by: Stephen Boyd Signed-off-by: Tero Kristo

clk: ti: dra7: add vpe clkctrl data

2020-01-20T07:39:52Z

Add clkctrl data for VPE. Signed-off-by: Benoit Parrot Acked-by: Tony Lindgren Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tero Kristo

clk: ti: dra7: add cam clkctrl data

2020-01-20T07:36:50Z

Add clkctrl data for CAM domain. Signed-off-by: Benoit Parrot Acked-by: Tony Lindgren Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Tero Kristo

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282

2019-06-05T15:36:37Z

Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Alexios Zavras Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman

dt-bindings: clock: dra7xx: add clkctrl indices for new data layout

2018-10-03T12:02:26Z

The new data layout will be split based on clockdomain boundaries, instead of CM boundaries. This introduces a few new clkctrl providers, that have different indices for the clkctrl data. Signed-off-by: Tero Kristo Tested-by: Tony Lindgren

clk: ti: dra7: Add clkctrl clock data for the mcan clocks

2018-07-10T05:30:48Z

Add clkctrl data for the m_can clocks and register it within the clkctrl driver Acked-by: Rob Herring Acked-by: Stephen Boyd CC: Tero Kristo Signed-off-by: Faiz Abbas Signed-off-by: Tony Lindgren

dt-bindings: clk: add dra7 clkctrl definitions

2017-12-01T13:17:18Z

Contains offsets for all dra7 clkctrl main and optional clocks. Signed-off-by: Tero Kristo