<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/asm-mips, branch linux-2.6.22.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-2.6.22.y</id>
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<updated>2007-07-06T15:17:11Z</updated>
<entry>
<title>[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores</title>
<updated>2007-07-06T15:17:11Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-06-20T23:22:34Z</published>
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<id>urn:sha1:4b3e975e4a06f1710693c5aa51b8f98facfa9863</id>
<content type='text'>
The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Add macros to encode processor revisions.</title>
<updated>2007-07-06T15:17:11Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-07-06T13:40:05Z</published>
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<id>urn:sha1:fde97822a295da9dffa4af643b49a58ffc4516ad</id>
<content type='text'>
Older processors used to encode processor version and revision in two
4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
have switched to use the 8-bits as 3:3:2 bitfield with the last field as
the patch number.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR.</title>
<updated>2007-07-06T15:17:11Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-07-05T07:14:21Z</published>
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<id>urn:sha1:075c733e19ce7530b53b78151cc4d303c8f64548</id>
<content type='text'>
The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
opposes it being called that) where invalid instructions in the same
I-cache line worth of instructions being fetched may case spurious
exceptions.

The workaround for this was only enabled for E9000 cores; enable it also
for all RM7000-based platforms.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] 64-bit TO_PHYS_MASK macro for RM9000 processors</title>
<updated>2007-07-06T15:17:10Z</updated>
<author>
<name>Andrew Sharp</name>
<email>tigerand@gmail.com</email>
</author>
<published>2007-03-23T19:15:18Z</published>
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<id>urn:sha1:5a1970959053143f6674f6d98c259452763a2f22</id>
<content type='text'>
Signed-off-by: Andrew Sharp &lt;tigerand@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Add whitelists for checksyscalls.sh</title>
<updated>2007-07-04T14:53:16Z</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-05-29T14:30:04Z</published>
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<id>urn:sha1:83d0f2332edb3001617e6a292c4412ae5f2bf659</id>
<content type='text'>
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] die(): Properly declare as non-returning</title>
<updated>2007-07-04T14:53:15Z</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2007-05-29T14:03:56Z</published>
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<id>urn:sha1:eaf2b8dca47cc1d4ca7fd83f37604e0f5478b33a</id>
<content type='text'>
 This marks the declaration of die() correctly, removing "control reaches
end of non-void function" warnings from non-void functions that die() at
the end.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix include wrapper symbol definitions in IP32 code.</title>
<updated>2007-07-04T14:53:15Z</updated>
<author>
<name>Kumba</name>
<email>kumba@gentoo.org</email>
</author>
<published>2007-05-25T06:26:47Z</published>
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<id>urn:sha1:ab012ebf9ebb5f3392e74c1666e7473b8567aeb0</id>
<content type='text'>
Some IP35 defines snuck into some IP32-specific code during the DMA re-write.

Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SMTC and non-SMTC kernel and modules are incompatible</title>
<updated>2007-06-26T17:57:34Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@mips.com</email>
</author>
<published>2007-06-20T13:25:27Z</published>
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<id>urn:sha1:2fae3731b1b02316c219c4556bb7ad3a920f73cc</id>
<content type='text'>
So don't allow mixing.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Remove a duplicated local variable in test_and_clear_bit()</title>
<updated>2007-06-26T17:57:33Z</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-06-13T15:56:31Z</published>
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<id>urn:sha1:8e09ffb60bbc2b49c06718d5a1252860c709a660</id>
<content type='text'>
Fix a sparse warning caused by 2c921d07f8c641e691b0dfd80a5cfe14c60ec489

include2/asm/bitops.h:313:23: warning: symbol 'res' shadows an earlier one
include2/asm/bitops.h:309:16: originally declared here

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] use compat_siginfo in rt_sigframe_n32</title>
<updated>2007-06-26T17:57:33Z</updated>
<author>
<name>Pavel Kiryukhin</name>
<email>vksavl@gmail.com</email>
</author>
<published>2007-06-05T09:42:20Z</published>
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<id>urn:sha1:a76f3a417a431eaf673323459357d8e684b52c49</id>
<content type='text'>
Signed-off-by: Pavel Kiryukhin &lt;vksavl@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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