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<title>kernel/drivers/video/fbdev/omap2/dss/dispc.c, branch linux-4.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y</id>
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<updated>2015-06-22T11:56:01Z</updated>
<entry>
<title>Merge omapdss scaling fixes</title>
<updated>2015-06-22T11:56:01Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-06-22T11:56:01Z</published>
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<id>urn:sha1:f778dad38a54ca5207d024b5ebe0e6d71b8bad83</id>
<content type='text'>
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: scaler debug print</title>
<updated>2015-06-17T12:44:29Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-10T09:48:39Z</published>
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<id>urn:sha1:e4c5ae7fdfa6cae39b458abb99ed669ba3c19af0</id>
<content type='text'>
Improve the DISPC debug print for scaling.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: do only y decimation on OMAP3</title>
<updated>2015-06-17T12:44:29Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-10T09:48:38Z</published>
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<id>urn:sha1:7059e3d8d8f0d716f8a6664f365bcbef9d147905</id>
<content type='text'>
The current driver does both x and y decimation on OMAP3 DSS. Testing
shows that x decimation rarely works, leading to underflows.

The exact reason for this is unclear, as the underflows seem to happen
even with low pixel clock rates, and I would presume that if the DSS can
manage a display with 140MHz pixel clock, it could manage x decimation
with factor 2 with a low pixel clock (~30MHz).

So it is possible that there is a problem somewhere else, in memory
management, or DSS DMA, or similar. I have not found anything that would
help this.

So, to fix the downscaling scaling, this patch removes x decimation for
OMAP3. This will limit some of the more demanding downscaling scenarios,
but one could argue that using DSS to downscale such a large amount is
insane in the first place, as the produced image is rather bad quality.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: check if scaling setup failed</title>
<updated>2015-06-17T12:44:28Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-10T09:48:37Z</published>
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<id>urn:sha1:3ce17b48da85d89769609c4302a016a1af63cfda</id>
<content type='text'>
The DISPC's scaling code seems to presume that decimation always
succeeds, and so we always do find a suitable downscaling setup.
However, this is not the case, and the algorithm can fail.

When that happens, the code just proceeds with wrong results, causing
issues later.

Add the necessary checks to bail out if the scaling algorithm failed.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: fix 64 bit issue in 5-tap</title>
<updated>2015-06-17T12:44:28Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-10T09:48:36Z</published>
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<id>urn:sha1:c582935c00227b4efc79630b149b1f077d7716b2</id>
<content type='text'>
The DISPC driver uses 64 bit arithmetic to calculate the required clock
rate for scaling. The code does not seem to work correctly, and instead
calculates with 32 bit numbers, giving wrong result.

Fix the code by typecasting values to u64 first, so that the
calculations do happen in 64 bits.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: fix row_inc for OMAP3</title>
<updated>2015-06-17T12:44:28Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-10T09:48:34Z</published>
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<id>urn:sha1:f2aee319d95fcba3d29424aeaf6d39d4c2a7890a</id>
<content type='text'>
pixel_inc and row_inc work differently on OMAP2/3 and OMAP4+ DSS. On
OMAP2/3 DSS, the pixel_inc is _not_ added by the HW at the end of the
line, after the last pixel, whereas on OMAP4+ it is.

The driver currently works for OMAP4+, but does not handle OMAP2/3
correctly, which leads to tilted image when row_inc is used.

This patch adds a flag to DISPC driver so that the pixel_inc is added
when required.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: add check for scaling limits</title>
<updated>2015-06-17T12:38:44Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-03-17T13:31:10Z</published>
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<id>urn:sha1:ab6b2582b8f931f8f324fbf7bcb8338b8fc1eded</id>
<content type='text'>
On OMAP3/AM43xx some scaling factors cause underflows/synclosts. After
studying this, I found that sometimes the driver uses three-tap scaling
with downscaling factor smaller than x0.5. This causes issues, as x0.5
is the limit for three-tap scaling.

The driver has FEAT_PARAM_DOWNSCALE parameter, but that seems to be for
five-tap scaling, which allows scaling down to x0.25.

This patch adds checks for both horizontal and vertical scaling. For
horizontal the HW always uses 5 taps, so the limit is x0.25.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: fix check_horiz_timing_omap3 args</title>
<updated>2015-06-17T12:38:43Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-03-17T13:31:09Z</published>
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<id>urn:sha1:f5a734827b07dc907ae95698f91d4b1eaafe9a8a</id>
<content type='text'>
After calculating the required decimation for scaling, the dispc driver
checks once more if the resulting configuration is valid by calling
check_horiz_timing_omap3().

Earlier calls to this function have correctly used in_width and
in_height as parameters, but the last call uses width and height. This
causes the driver to possibly reject scaling that would work.

This patch fixes the parameters.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: fix predecimation for YUV modes</title>
<updated>2015-06-17T12:38:43Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-02-27T11:07:58Z</published>
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<id>urn:sha1:c4661b33181708cddb96c72f629eae9cdeea271f</id>
<content type='text'>
DISPC needs even input buffer width for YUV modes. The DISPC driver
doesn't check this at the moment (although omapdrm does), but worse,
when DISPC driver does x predecimation the result may be uneven. This
causes sometimes sync losts, underflows, or just visual errors.

This patch makes DISPC driver return an error if the user gives uneven
input width for a YUV buffer. It also makes the input width even in case
of predecimation.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAPDSS: DISPC: work-around for errata i631</title>
<updated>2015-06-17T12:38:43Z</updated>
<author>
<name>Tomi Valkeinen</name>
<email>tomi.valkeinen@ti.com</email>
</author>
<published>2015-04-09T10:51:30Z</published>
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<id>urn:sha1:3397cc6a7199993150d09d9bf055ae130058a684</id>
<content type='text'>
Errata i631 description:

"When in YUV4:2:0 format in 1D burst, the DISPC DMA skips lines when
fetching Chroma sampling."

Workaround:

"If YUV4:2:0-1D burst is required: Set
DISPC_VIDp_ATTRIBUTES[22]DOUBLESTRIDE to 0x0 and
DISPC_VIDp_ATTRIBUTES[13:12]ROTATION to 0x1 or 0x3"

The description is somewhat confusing, but testing has shown that DSS
fetches extra rows from memory when using NV12 format in 1D mode. If the
memory after the framebuffer is inaccessible, this leads to OCP errors.

The driver always uses DOUBLESTRIDE=0 when using 1D mode, so we only
need to handle the ROTATION part.

The issue exist on all OMAP4 and OMAP5 based DSS IPs.

Signed-off-by: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
</content>
</entry>
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