kernel/drivers/usb/dwc3/Kconfig, branch linux-6.9.y

usb: dwc3: qcom: Remove ACPI support from glue driver

2024-03-05T13:06:14Z

Minimal ACPI support was added to the Qualcomm DWC3 glue driver in order to enable USB on SDM850 and SC8180X compute platforms. The support is still functional, but unnoticed regressions in other drivers indicates that no one actually booting any of platforms dependent on this implementation. The functionality provides is the bare minimum and is not expected to aid in the effort of bringing full ACPI support to the driver in the future. Remove the ACPI code from the Qualcomm DWC3 glue driver to aid in the implementation of improvements that are actually used like multiport and flattening device tree. Commit message by Bjorn Andersson. Signed-off-by: Krishna Kurapati Reviewed-by: Johan Hovold Link: https://lore.kernel.org/r/20240305093216.3814787-1-quic_kriskura@quicinc.com Signed-off-by: Greg Kroah-Hartman

usb: dwc3: add Realtek DHC RTD SoC dwc3 glue layer driver

2023-10-02T12:05:24Z

Realtek DHC RTD SoCs integrate dwc3 IP and has some customizations to support different generations of SoCs. The RTD1619b subclass SoC only supports USB 2.0 from dwc3. The driver can set a maximum speed to support this. Add role switching function, that can switch USB roles through other drivers, or switch USB roles through user space through set /sys/class/usb_role/. Signed-off-by: Stanley Chang Acked-by: Thinh Nguyen Link: https://lore.kernel.org/r/20230826031028.1892-1-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman

usb: dwc3: dwc3-octeon: Convert to glue driver

2023-08-04T12:52:15Z

DWC3 as implemented in Cavium SoC is using UCTL bridge unit between I/O interconnect and USB controller. Currently there is no bond with dwc3 core code, so if anything goes wrong in UCTL setup dwc3 is left in reset, which leads to bus error while trying to read any device register. Thus any failure in UCTL initialization ends with kernel panic. To avoid this move Octeon DWC3 glue code from arch/mips and make it proper glue driver which is used instead of dwc3-of-simple. Signed-off-by: Ladislav Michl Acked-by: Thomas Bogendoerfer Acked-by: Thinh Nguyen Link: https://lore.kernel.org/r/ZMd/ReyiY7wS6DvN@lenoch Signed-off-by: Greg Kroah-Hartman

usb: dwc3: fix extcon dependency

2023-01-19T13:19:49Z

The dwc3 core support now links against the extcon subsystem, so it cannot be built-in when extcon is a loadable module: arm-linux-gnueabi-ld: drivers/usb/dwc3/core.o: in function `dwc3_get_extcon': core.c:(.text+0x572): undefined reference to `extcon_get_edev_by_phandle' arm-linux-gnueabi-ld: core.c:(.text+0x596): undefined reference to `extcon_get_extcon_dev' arm-linux-gnueabi-ld: core.c:(.text+0x5ea): undefined reference to `extcon_find_edev_by_node' There was already a Kconfig dependency in the dual-role support, but this is now needed for the entire dwc3 driver. It is still possible to build dwc3 without extcon, but this prevents it from being set to built-in when extcon is a loadable module. Fixes: d182c2e1bc92 ("usb: dwc3: Don't switch OTG -> peripheral if extcon is present") Signed-off-by: Arnd Bergmann Reviewed-by: Andy Shevchenko Acked-by: Thinh Nguyen Link: https://lore.kernel.org/r/20230118090147.2126563-1-arnd@kernel.org Signed-off-by: Greg Kroah-Hartman

usb: dwc3: improve the config dependency of USB_DWC3_XILINX

2022-11-22T16:30:21Z

A request to Manish Narani (see Link) asked for clarification of the reference to the config ARCH_VERSAL in the support of Xilinx SoCs with DesignWare Core USB3 IP. As there is no response, clean up the reference to the non-existing config symbol. While at it, follow up on Felipe Balbi's request to add the alternative COMPILE_TEST dependency. Link: https://lore.kernel.org/all/CAKXUXMwgWfX8+OvY0aCwRNukencwJERAZzU7p4eOLXQ2zv6rAg@mail.gmail.com/ Signed-off-by: Lukas Bulwahn Acked-by: Thinh Nguyen Link: https://lore.kernel.org/r/20221116110444.8340-1-lukas.bulwahn@gmail.com Signed-off-by: Greg Kroah-Hartman

usb: dwc3: Fix typos in Kconfig

2022-06-12T04:49:47Z

Fixes the following 2 typos in Kconfig: 1. is -> as 2. progammed -> programmed Signed-off-by: Kushagra Verma Link: https://lore.kernel.org/r/HK0PR01MB280151A3B2CF6C3E4DC2F9CAF8D39@HK0PR01MB2801.apcprd01.prod.exchangelabs.com Signed-off-by: Greg Kroah-Hartman

drivers: usb: dwc3: Add AM62 USB wrapper driver

2022-04-21T16:31:56Z

In AM62 SoC, the Designware Core USB3 IP is progammed to operate in USB2.0 only mode. Add driver for AM62 USB DWC3 Wrapper. Signed-off-by: Aswath Govindraju Link: https://lore.kernel.org/r/20220414103211.16202-3-a-govindraju@ti.com Signed-off-by: Greg Kroah-Hartman

usb: exynos: describe driver in KConfig

2021-10-05T10:55:50Z

Describe better which driver applies to which SoC, to make configuring kernel for Samsung SoC easier. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20210924133005.111564-1-krzysztof.kozlowski@canonical.com Signed-off-by: Greg Kroah-Hartman

usb: dwc3: Add driver for Xilinx platforms

2021-03-23T11:48:14Z

Add a new driver for supporting Xilinx platforms. This driver is used for some sequence of operations required for Xilinx USB controllers. This driver is also used to choose between PIPE clock coming from SerDes and the Suspend Clock. Before the controller is out of reset, the clock selection should be changed to PIPE clock in order to make the USB controller work. There is a register added in Xilinx USB controller register space for the same. Signed-off-by: Manish Narani Link: https://lore.kernel.org/r/1615963949-75320-3-git-send-email-manish.narani@xilinx.com Signed-off-by: Greg Kroah-Hartman

usb: dwc3: add imx8mp dwc3 glue layer driver

2021-01-04T15:38:08Z

imx8mp SoC integrate dwc3 3.30b IP and has some customizations to support low power, which has a seprated wakeup irq and additional logic to wakeup usb from low power mode both for host mode and device mode. Signed-off-by: Li Jun Link: https://lore.kernel.org/r/1609241866-9508-3-git-send-email-jun.li@nxp.com Signed-off-by: Greg Kroah-Hartman