kernel/drivers/usb/dwc2/params.c, branch linux-6.9.y

usb: dwc2: Disable clock gating feature on Rockchip SoCs

2024-01-02T13:35:23Z

The DWC2 IP on the Rockchip SoCs doesn't support clock gating. When a clock gating is enabled, system hangs. Signed-off-by: William Wu Acked-by: Minas Harutyunyan Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com Signed-off-by: Greg Kroah-Hartman

usb: Use device_get_match_data()

2023-10-10T06:55:23Z

Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20231009211356.3242037-16-robh@kernel.org Signed-off-by: Greg Kroah-Hartman

usb: dwc2: add pci_device_id driver_data parse support

2023-08-22T12:49:12Z

The dwc2 driver has everything we need to run in PCI mode except for pci_device_id driver_data parse. With that to set Loongson dwc2 element and added identified as PCI_VENDOR_ID_LOONGSON and PCI_DEVICE_ID_LOONGSON_DWC2 in dwc2_pci_ids, the Loongson dwc2 controller will work. Signed-off-by: Yinbo Zhu Link: https://lore.kernel.org/r/20230815065833.3375-1-zhuyinbo@loongson.cn Signed-off-by: Greg Kroah-Hartman

usb: dwc2: support dwc2 IP for Amlogic A1 SoC family

2023-05-13T10:03:24Z

The Amlogic A1 uses dwc2 Synopsys IP as its USB peripheral (gadget) endpoint, with different DWC2 parameters when compared to previous Amlogic SoCs. Signed-off-by: Dmitry Rokosov Reviewed-by: Neil Armstrong Acked-by: Minas Harutyunyan Link: https://lore.kernel.org/r/20230511210455.6634-2-ddrokosov@sberdevices.ru Signed-off-by: Greg Kroah-Hartman

usb: Use of_property_read_bool() for boolean properties

2023-03-16T11:14:56Z

It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to to of_property_read_bool(). Signed-off-by: Rob Herring Reviewed-by: Richard Leitner Link: https://lore.kernel.org/r/20230310144729.1545857-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman

usb: dwc2: disable lpm feature on Rockchip SoCs

2022-12-08T15:50:56Z

LPM feature of DWC2 module integrated in Rockchip SoCs doesn't work properly or needs some additional handling, so disable it for now. Without disabling LPM feature, the USB ADB communication fail with the following error log: dwc2 ff580000.usb: new address 27 dwc2 ff580000.usb: Failed to exit L1 sleep state in 200us. dwc2 ff580000.usb: dwc2_hsotg_send_reply: cannot queue req dwc2 ff580000.usb: dwc2_hsotg_process_req_status: failed to send reply dwc2 ff580000.usb: dwc2_hsotg_enqueue_setup: failed queue (-11) dwc2 ff580000.usb: Failed to exit L1 sleep state in 200us. [diff vs vendor kernel: added lpm_clock_gating, besl and hird_threshold_en settings as seen in commit 53febc956900 ("usb: dwc2: disable Link Power Management on STM32MP15 HS OTG")] Signed-off-by: William Wu Signed-off-by: Frank Wang Signed-off-by: Quentin Schulz Link: https://lore.kernel.org/r/20221206-dwc2-gadget-dual-role-v1-1-36515e1092cd@theobroma-systems.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Remove redundant license text

2022-09-22T13:52:29Z

SPDX-License-Identifier have been added in commit 5fd54ace4721 ("USB: add SPDX identifiers to all remaining files in drivers/usb/") There is no point in keeping the now redundant license text. Remove it. Acked-by: Minas Harutyunyan Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/030a7e187d707f8734a492cda7a6b54d459c4bb3.1662788747.git.christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman

USB: dwc2: Add OTG support for Ingenic SoCs.

2022-04-21T17:22:00Z

Add OTG support for the JZ4775 SoC, the JZ4780 SoC, the X1000 SoC, the X1600 SoC, the X1700 SoC, the X1830 SoC, and the X2000 SoC from Ingenic. Introduce support for disable Ingenic overcurrent detection, once selected, it enables the GOTGCTL register bits VbvalidOvEn and VbvalidOvVal to disable the VBUS overcurrent detection. This patch is derived from Dragan Čečavac (in the kernel 3.18.3 tree of CI20). It is very useful for the MIPS Creator CI20 (r1). Without this patch, OTG port of CI20 has a great probability to face overcurrent warning, which breaks the OTG functionality. Acked-by: Minas Harutyunyan Signed-off-by: Dragan Čečavac Signed-off-by: 周琰杰 (Zhou Yanjie) Link: https://lore.kernel.org/r/1649964337-114337-3-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Add platform specific data for Intel's Agilex

2022-02-11T10:15:22Z

The DWC2 IP on the Agilex platform does not support clock-gating. Acked-by: Minas Harutyunyan Signed-off-by: Dinh Nguyen Link: https://lore.kernel.org/r/20220125161821.1951906-2-dinguyen@kernel.org Signed-off-by: Greg Kroah-Hartman

usb: dwc2: stm32mp15: set otg_rev

2021-10-25T07:20:26Z

STM32MP15 complies with the OTG 2.0. Set OTG revision accordingly. It is useful for the of_usb_update_otg_caps() routine to check and update otg_rev to the lower value between DT and provided params. Signed-off-by: Fabrice Gasnier Link: https://lore.kernel.org/r/1634133425-25670-5-git-send-email-fabrice.gasnier@foss.st.com Signed-off-by: Greg Kroah-Hartman