kernel/drivers/usb/dwc2/hw.h, branch linux-6.9.y

usb: dwc2: host: Fix ISOC flow in DDMA mode

2024-03-26T13:56:23Z

Fixed ISOC completion flow in DDMA mode. Added isoc descriptor actual length value and update urb's start_frame value. Fixed initialization of ISOC DMA descriptors flow. Fixes: 56f5b1cff22a ("staging: Core files for the DWC2 driver") Fixes: 20f2eb9c4cf8 ("staging: dwc2: add microframe scheduler from downstream Pi kernel") Fixes: c17b337c1ea4 ("usb: dwc2: host: program descriptor for next frame") Fixes: dc4c76e7b22c ("staging: HCD descriptor DMA support for the DWC2 driver") Fixes: 762d3a1a9cd7 ("usb: dwc2: host: process all completed urbs") CC: stable@vger.kernel.org Signed-off-by: Minas Harutyunyan Link: https://lore.kernel.org/r/a8b1e1711cc6cabfb45d92ede12e35445c66f06c.1708944698.git.Minas.Harutyunyan@synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Remove redundant license text

2022-09-22T13:52:29Z

SPDX-License-Identifier have been added in commit 5fd54ace4721 ("USB: add SPDX identifiers to all remaining files in drivers/usb/") There is no point in keeping the now redundant license text. Remove it. Acked-by: Minas Harutyunyan Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/030a7e187d707f8734a492cda7a6b54d459c4bb3.1662788747.git.christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Update enter and exit partial power down functions

2021-04-09T13:16:38Z

These are wrapper functions which are calling device or host enter/exit partial power down functions. This change is done because we need to separate device and host partial power down functions as the programming flow has a lot of difference between host and device. With this update during partial power down exit driver relies on backup value of "GOTGCTL_CURMODE_HOST" to determine the mode of core before entering to PPD. Acked-by: Minas Harutyunyan Signed-off-by: Artur Petrosyan Link: https://lore.kernel.org/r/20210408094446.6491BA022E@mailhost.synopsys.com Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Update Core Reset programming flow.

2020-05-25T08:09:44Z

Starting from core version 4.20a Core Reset flow is changed. Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE. Core Reset new programming flow steps are follow: 1. Set GRSTCTL_CSFTRST bit. 2. Wait for bit GRSTCTL_CSFTRST_DONE is set. 3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits. Check core version functionality separated from dwc2_get_hwparams() to new dwc2_check_core_version() function because Core Reset flow depend on SNPSID. Signed-off-by: Minas Harutyunyan Signed-off-by: Felipe Balbi

USB: dwc2: Use the correct style for SPDX License Identifier

2020-05-05T07:58:50Z

This patch corrects the SPDX License Identifier style in header files related to DesignWare USB2 DRD Core Support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches Signed-off-by: Nishad Kamdar Signed-off-by: Felipe Balbi

usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS

2020-03-15T09:06:39Z

This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan Signed-off-by: Amelie Delaunay Signed-off-by: Felipe Balbi

usb: dwc2: Move UTMI_PHY_DATA defines closer

2019-05-03T06:13:48Z

Makes GHWCFG4_UTMI_PHY_DATA* defines closer to their relative shift and mask defines to improve readability. Acked-by: Minas Harutyunyan Signed-off-by: Jules Maselbas Signed-off-by: Felipe Balbi

usb: dwc2: gadget: Reject LPM token during Control transfers

2019-05-03T06:13:47Z

Avoiding switch to L1 state in any stage of control transfers. Send NYET handshake to LPM token. Renamed GLPMCFG_LPM_ACCEPT_CTRL_ISOC to GLPMCFG_LPM_REJECT_CTRL_CONTROL because by setting this bit core reject LPM token. Signed-off-by: Minas Harutyunyan Signed-off-by: Felipe Balbi

usb: dwc2: gadget: Accept LPM token when TxFIFO is not empty

2018-11-26T07:06:32Z

Set GLPMCFG_LPM_ACCEPT_CTRL_ISOC bit in GLPMCFG register to accept LPM token during ISOC transfers when TxFIFO is not empty. - Added two definitions. #define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL BIT(21) #define GLPMCFG_LPM_ACCEPT_CTRL_ISOC BIT(22) This patch uses GLPMCFG_LPM_ACCEPT_CTRL_ISOC. GLPMCFG_LPM_ACCEPT_CTRL_CONTROL is defined for further use. - Added setting GLPMCFG_LPM_ACCEPT_CTRL_ISOC bit in GLPMCFG register in dwc2_gadget_init_lpm function. Signed-off-by: Artur Petrosyan Signed-off-by: Minas Harutyunyan Signed-off-by: Felipe Balbi

usb: dwc2: Add definitions for new registers

2018-10-02T07:49:59Z

New registers were added to dwc otg core. GREFCLK - This register used to control ref_clk parameters. GINTSTS2 - New WKUP_ALERT interrupt was added. GINTMSK2 - Mask register for GINTSTS2. Acked-by: Minas Harutyunyan Signed-off-by: Grigor Tovmasyan Signed-off-by: Felipe Balbi