<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/thunderbolt/usb4.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2024-04-10T07:49:58Z</updated>
<entry>
<title>thunderbolt: Avoid notify PM core about runtime PM resume</title>
<updated>2024-04-10T07:49:58Z</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-03-01T13:11:18Z</published>
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<id>urn:sha1:dcd12acaf384c30437fa5a9a1f71df06fc9835fd</id>
<content type='text'>
Currently we notify PM core about occurred wakes after any resume. This
is not actually needed after resume from runtime suspend. Hence, notify
PM core about occurred wakes only after resume from system sleep. Also,
if the wake occurred in USB4 router upstream port, we don't notify the
PM core about it since it is not actually needed and can cause
unexpected autowake (e.g. if /sys/power/wakeup_count is used).

While there add the missing kernel-doc for tb_switch_resume().

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'thunderbolt-for-v6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next</title>
<updated>2024-03-02T19:14:03Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2024-03-02T19:14:03Z</published>
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<id>urn:sha1:73473b3033a633d640ef065aa98d60fbe2d40ddb</id>
<content type='text'>
Mika writes:

thunderbolt: Changes for v6.9 merge window

This includes following USB4/Thunderbolt changes for the v6.9 merge
window:

  - Reset the topology also for USB4 v1 routers on driver load
  - DisplayPort tunneling and bandwidth allocation mode improvements
  - Tracepoint support for the control channel
  - Couple of minor fixes and cleanups.

All these have been in linux-next with no reported issues.

* tag 'thunderbolt-for-v6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (23 commits)
  thunderbolt: Constify the struct device_type usage
  thunderbolt: Add trace events support for the control channel
  thunderbolt: Keep the domain powered when USB4 port is in redrive mode
  thunderbolt: Improve DisplayPort tunnel setup process to be more robust
  thunderbolt: Calculate DisplayPort tunnel bandwidth after DPRX capabilities read
  thunderbolt: Reserve released DisplayPort bandwidth for a group for 10 seconds
  thunderbolt: Introduce tb_tunnel_direction_downstream()
  thunderbolt: Re-order bandwidth group functions
  thunderbolt: Fail the failed bandwidth request properly
  thunderbolt: Log an error if DPTX request is not cleared
  thunderbolt: Handle bandwidth allocation mode disable request
  thunderbolt: Re-calculate estimated bandwidth when allocation mode is enabled
  thunderbolt: Use DP_LOCAL_CAP for maximum bandwidth calculation
  thunderbolt: Correct typo in host_reset parameter
  thunderbolt: Skip discovery also in USB4 v2 host
  thunderbolt: Reset only non-USB4 host routers in resume
  thunderbolt: Remove usage of the deprecated ida_simple_xx() API
  thunderbolt: Fix rollback in tb_port_lane_bonding_enable() for lane 1
  thunderbolt: Fix XDomain rx_lanes_show and tx_lanes_show
  thunderbolt: Reset topology created by the boot firmware
  ...
</content>
</entry>
<entry>
<title>thunderbolt: Log an error if DPTX request is not cleared</title>
<updated>2024-02-16T10:29:22Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-12-28T14:49:45Z</published>
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<id>urn:sha1:2ec67a48cf8f18b8c6cecc70dcd5d52cbf8eba7e</id>
<content type='text'>
This helps debugging issues around DisplayPort bandwidth allocation
mode.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Fix setting the CNS bit in ROUTER_CS_5</title>
<updated>2024-01-29T07:48:40Z</updated>
<author>
<name>Mohammad Rahimi</name>
<email>rahimi.mhmmd@gmail.com</email>
</author>
<published>2024-01-27T03:26:28Z</published>
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<id>urn:sha1:ec4d82f855ce332de26fe080892483de98cc1a19</id>
<content type='text'>
The bit 23, CM TBT3 Not Supported (CNS), in ROUTER_CS_5 indicates
whether a USB4 Connection Manager is TBT3-Compatible and should be:
    0b for TBT3-Compatible
    1b for Not TBT3-Compatible

Fixes: b04079837b20 ("thunderbolt: Add initial support for USB4")
Cc: stable@vger.kernel.org
Signed-off-by: Mohammad Rahimi &lt;rahimi.mhmmd@gmail.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Introduce tb_port_reset()</title>
<updated>2024-01-22T11:21:06Z</updated>
<author>
<name>Sanath S</name>
<email>Sanath.S@amd.com</email>
</author>
<published>2024-01-13T09:39:57Z</published>
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<id>urn:sha1:01da6b99d49f60b1edead44e33569b1a2e9f49b7</id>
<content type='text'>
Introduce a function that issues Downstream Port Reset to a USB4 port.
This supports Thunderbolt 2, 3 and USB4 routers.

Signed-off-by: Sanath S &lt;Sanath.S@amd.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Fix minimum allocated USB 3.x and PCIe bandwidth</title>
<updated>2023-12-08T07:03:49Z</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2023-11-30T16:17:13Z</published>
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<id>urn:sha1:f0b94c1c5c7994a74e487f43c91cfc922105a423</id>
<content type='text'>
With the current bandwidth allocation we end up reserving too much for the USB
3.x and PCIe tunnels that leads to reduced capabilities for the second
DisplayPort tunnel.

Fix this by decreasing the USB 3.x allocation to 900 Mb/s which then allows
both tunnels to get the maximum HBR2 bandwidth.  This way, the reserved
bandwidth for USB 3.x and PCIe, would be 1350 Mb/s (taking weights of USB 3.x
and PCIe into account). So bandwidth allocations on a link are:
USB 3.x + PCIe tunnels =&gt; 1350 Mb/s
DisplayPort tunnel #1  =&gt; 17280 Mb/s
DisplayPort tunnel #2  =&gt; 17280 Mb/s

Total consumed bandwidth is 35910 Mb/s. So that all the above can be tunneled
on a Gen 3 link (which allows maximum of 36000 Mb/s).

Fixes: 582e70b0d3a4 ("thunderbolt: Change bandwidth reservations to comply USB4 v2")
Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add support for asymmetric link</title>
<updated>2023-10-20T15:18:01Z</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2023-08-10T19:37:15Z</published>
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<id>urn:sha1:81af2952e60603d12415e1a6fd200f8073a2ad8b</id>
<content type='text'>
USB4 v2 spec defines a Gen 4 link that can operate as an aggregated
symmetric (80/80G) or asymmetric (120/40G). When the link is asymmetric,
the USB4 port on one side of the link operates with three TX lanes and
one RX lane, while the USB4 port on the opposite side of the link
operates with three RX lanes and one TX lane.

Add support for the asymmetric link and provide functions that can be
used to transition the link to asymmetric and back.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Co-developed-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Get rid of usb4_usb3_port_actual_link_rate()</title>
<updated>2023-10-13T05:49:13Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-08-31T11:15:26Z</published>
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<id>urn:sha1:92b8f7a1b1f95fce5dee1a64902cab9f55576748</id>
<content type='text'>
It turns out there is no need to use the actual link rate when
reclaiming bandwidth for USB 3.x. The reason is that we use consumed
bandwidth which is coming from xHCI when releasing bandwidth (for
example for DisplayPort tunneling) and this can be anything between
1000 Mb/s to maximum, so when reclaiming we can just bump it up back to
maximum instead of actual link rate (which is always &lt;= maximum).

This allows us to get rid of couple of unnecessary lines of code.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Make bandwidth allocation mode function names consistent</title>
<updated>2023-06-16T06:53:29Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-02-01T11:21:37Z</published>
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<id>urn:sha1:8d73f6b8e0487ac0ed4acd883a6788b2492a5692</id>
<content type='text'>
Make sure the DisplayPort bandwidth allocation mode function names are
consistent with the existing ones, such as USB3.

No functional changes.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add support for enhanced uni-directional TMU mode</title>
<updated>2023-06-16T06:53:28Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2022-10-11T09:11:09Z</published>
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<id>urn:sha1:d49b4f043d63bddf4c1836623b8ae800878ed2e3</id>
<content type='text'>
This is new TMU mode introduced with the USB4 v2. This mode is simpler
than the existing ones and allows all CL states as well. Enable this for
all links where both side routers are v2 and keep the existing
functionality for the v1 and earlier links.

Currently only support the MedRes rate. We can add the HiFi rate later
too if it turns out to be useful.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
</feed>
