<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/spi/Makefile, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2019-02-19T15:28:53Z</updated>
<entry>
<title>spi: sifive: Add driver for the SiFive SPI controller</title>
<updated>2019-02-19T15:28:53Z</updated>
<author>
<name>Yash Shah</name>
<email>yash.shah@sifive.com</email>
</author>
<published>2019-02-19T11:40:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=484a9a68d669f899657a97dbb369cb3e3be7e7f5'/>
<id>urn:sha1:484a9a68d669f899657a97dbb369cb3e3be7e7f5</id>
<content type='text'>
Add driver for the SiFive SPI controller
on the HiFive Unleashed board.

Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Yash Shah &lt;yash.shah@sifive.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-mem: Add driver for NXP FlexSPI controller</title>
<updated>2019-01-28T12:27:44Z</updated>
<author>
<name>Yogesh Narayan Gaur</name>
<email>yogeshnarayan.gaur@nxp.com</email>
</author>
<published>2019-01-15T12:00:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a5356aef6a907c2e2aed0caaa2b88b6021394471'/>
<id>urn:sha1:a5356aef6a907c2e2aed0caaa2b88b6021394471</id>
<content type='text'>
- Add driver for NXP FlexSPI host controller

(0) What is the FlexSPI controller?
 FlexSPI is a flexsible SPI host controller which supports two SPI
 channels and up to 4 external devices. Each channel supports
 Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
 data lines) i.e. FlexSPI acts as an interface to external devices,
 maximum 4, each with up to 8 bidirectional data lines.

 It uses new SPI memory interface of the SPI framework to issue
 flash memory operations to up to four connected flash
 devices (2 buses with 2 CS each).

(1) Tested this driver with the mtd_debug and JFFS2 filesystem utility
 on NXP LX2160ARDB and LX2160AQDS targets.
 LX2160ARDB is having two NOR slave device connected on single bus A
 i.e. A0 and A1 (CS0 and CS1).
 LX2160AQDS is having two NOR slave device connected on separate buses
 one flash on A0 and second on B1 i.e. (CS0 and CS3).
 Verified this driver on following SPI NOR flashes:
    Micron, mt35xu512ab, [Read - 1 bit mode]
    Cypress, s25fl512s, [Read - 1/2/4 bit mode]

Signed-off-by: Yogesh Narayan Gaur &lt;yogeshnarayan.gaur@nxp.com&gt;
Reviewed-by: Frieder Schrempf &lt;frieder.schrempf@kontron.de&gt;
Reviewed-by: Boris Brezillon &lt;bbrezillon@kernel.org&gt;
Tested-by: Ashish Kumar &lt;Ashish.Kumar@nxp.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Add a driver for the Freescale/NXP QuadSPI controller</title>
<updated>2019-01-07T16:56:24Z</updated>
<author>
<name>Frieder Schrempf</name>
<email>frieder.schrempf@kontron.de</email>
</author>
<published>2019-01-07T09:29:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=84d043185dbe0d1b4f6db575bd91c834d37e2f78'/>
<id>urn:sha1:84d043185dbe0d1b4f6db575bd91c834d37e2f78</id>
<content type='text'>
This driver is derived from the SPI NOR driver at
mtd/spi-nor/fsl-quadspi.c. It uses the new SPI memory interface
of the SPI framework to issue flash memory operations to up to
four connected flash chips (2 buses with 2 CS each).

The controller does not support generic SPI messages.

This patch also disables the build of the "old" driver and reuses
its Kconfig option CONFIG_SPI_FSL_QUADSPI to replace it.

Signed-off-by: Frieder Schrempf &lt;frieder.schrempf@kontron.de&gt;
Acked-by: Han Xu &lt;han.xu@nxp.com&gt;
Reviewed-by: Yogesh Gaur &lt;yogeshnarayan.gaur@nxp.com&gt;
Tested-by: Yogesh Gaur &lt;yogeshnarayan.gaur@nxp.com&gt;
Tested-by: Han Xu &lt;han.xu@nxp.com&gt;
Reviewed-by: Boris Brezillon &lt;bbrezillon@kernel.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/mem' and 'spi/topic/mtd' into spi-next</title>
<updated>2018-12-20T16:01:30Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2018-12-20T16:01:30Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=74ff666bd7ba2da563f99f2a8af7bf9f20008bc9'/>
<id>urn:sha1:74ff666bd7ba2da563f99f2a8af7bf9f20008bc9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>spi: npcm: add NPCM PSPI controller driver</title>
<updated>2018-11-13T20:01:22Z</updated>
<author>
<name>Tomer Maimon</name>
<email>tmaimon77@gmail.com</email>
</author>
<published>2018-11-12T16:42:32Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2a22f1b30cee8d1e104a6c5062a609bedbfd5c39'/>
<id>urn:sha1:2a22f1b30cee8d1e104a6c5062a609bedbfd5c39</id>
<content type='text'>
Add Nuvoton NPCM BMC Peripheral SPI controller driver.

Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Add QuadSPI driver for Atmel SAMA5D2</title>
<updated>2018-11-07T13:21:19Z</updated>
<author>
<name>Piotr Bugalski</name>
<email>bugalski.piotr@gmail.com</email>
</author>
<published>2018-11-05T10:36:24Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0e6aae08e9ae7c2dc3c83bf6960d824feb14b706'/>
<id>urn:sha1:0e6aae08e9ae7c2dc3c83bf6960d824feb14b706</id>
<content type='text'>
Kernel contains QSPI driver strongly tied to MTD and nor-flash memory.
New spi-mem interface allows usage also other memory types, especially
much larger NAND with SPI interface. This driver works as SPI controller
and is not related to MTD, however can work with NAND-flash or other
peripherals using spi-mem interface.

Suggested-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
Signed-off-by: Piotr Bugalski &lt;bugalski.piotr@gmail.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Add MXIC controller driver</title>
<updated>2018-11-05T11:55:06Z</updated>
<author>
<name>Mason Yang</name>
<email>masonccyang@mxic.com.tw</email>
</author>
<published>2018-10-17T02:08:11Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b942d80b0a394e8ea18fce3b032b4700439e8ca3'/>
<id>urn:sha1:b942d80b0a394e8ea18fce3b032b4700439e8ca3</id>
<content type='text'>
Add a driver for Macronix SPI controller IP.

Signed-off-by: Mason Yang &lt;masonccyang@mxic.com.tw&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd</title>
<updated>2018-10-25T13:19:15Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-10-25T13:19:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3ea172c84dc5a88f4fa7316311857f5878bcf777'/>
<id>urn:sha1:3ea172c84dc5a88f4fa7316311857f5878bcf777</id>
<content type='text'>
Pull MFD updates from Lee Jones:
 "New Drivers
   - Add support for USART SPI to AT91*

  New Functionality
   - Add support for Audio CODECs to motorola-cpcap

  Fix-ups
   - DT documentation fix-ups; atmel-usart
   - Staticise functions/structs; spi-at91-usart, arizona-core
   - Constify; ti-lmu
   - Fix memory leaks; menelaus
   - Change device 'wake-up' status; ti_am335x_tscadc, max8997
   - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997
   - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers),
   - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_*
   - Build as module; sec-irq
   - Use new %pOFn printk format for device_node.name; max77620
   - Remove unused code; madera
   - Use generic MACROs; intel_msic, intel_soc_pmic_crc
   - Move to GPIOD; ti-lmu
   - Use managed resources; ti-lmu

  Bug Fixes
   - Add missing headers; at91-usart
   - Prevent device from entering low-power mode; arizona-core
   - Poll for BOOT_DONE to avoid still-booting NACK; madera-core
   - Prevent ADC read from shutting down device; mc13xxx-core"

* tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits)
  mfd: cros_ec: Avoid unneeded internal declaration warning
  mfd: ti-lmu: Use of_device_get_match_data() helper
  mfd: ti-lmu: Use managed resource for everything
  mfd: ti-lmu: Switch to GPIOD
  mfd: ti-lmu: constify mfd_cell tables
  mfd: max8997: Disable interrupt handling for suspend/resume cycle
  mfd: max8997: Enale irq-wakeup unconditionally
  mfd: arizona: Make array mclk_name static, shrinks object size
  MAINTAINERS: Add myself as designated reviewer of Intel MFD PMIC
  mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier.
  mfd: Sort headers alphabetically for Intel PMIC drivers
  mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well
  mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro
  mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro
  mfd: intel_msic: Use DEFINE_RES_IRQ() macro
  mfd: motorola-cpcap: Add audio-codec support
  mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC values
  mfd: madera: Remove unused forward reference
  mfd: max77620: Convert to using %pOFn instead of device_node.name
  mfd: madera: Don't use regmap_read_poll_timeout to poll for BOOT_DONE
  ...
</content>
</entry>
<entry>
<title>spi: spi-mem: add stm32 qspi controller</title>
<updated>2018-10-19T12:32:56Z</updated>
<author>
<name>Ludovic Barre</name>
<email>ludovic.barre@st.com</email>
</author>
<published>2018-10-05T07:43:03Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c530cd1d9d5e7741c641c5c366ddb4e23aa5caec'/>
<id>urn:sha1:c530cd1d9d5e7741c641c5c366ddb4e23aa5caec</id>
<content type='text'>
The qspi controller is a specialized communication interface
targeting single, dual or quad SPI Flash memories (NOR/NAND).

It can operate in any of the following modes:
-indirect mode: all the operations are performed using the quadspi
 registers
-read memory-mapped mode: the external Flash memory is mapped to the
 microcontroller address space and is seen by the system as if it was
 an internal memory

tested on:
-NOR: mx66l51235l
-NAND: MT29F2G01ABAGD

Signed-off-by: Ludovic Barre &lt;ludovic.barre@st.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-geni-qcom: Add SPI driver support for GENI based QUP</title>
<updated>2018-10-11T14:28:02Z</updated>
<author>
<name>Girish Mahadevan</name>
<email>girishm@codeaurora.org</email>
</author>
<published>2018-10-03T13:44:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=561de45f72bd5f9b3f166bdd6151d4d0fe9e6534'/>
<id>urn:sha1:561de45f72bd5f9b3f166bdd6151d4d0fe9e6534</id>
<content type='text'>
This driver supports GENI based SPI Controller in the Qualcomm SOCs. The
Qualcomm Generic Interface (GENI) is a programmable module supporting a
wide range of serial interfaces including SPI. This driver supports SPI
operations using FIFO mode of transfer.

Signed-off-by: Girish Mahadevan &lt;girishm@codeaurora.org&gt;
Signed-off-by: Dilip Kota &lt;dkota@codeaurora.org&gt;
Signed-off-by: Alok Chauhan &lt;alokc@codeaurora.org&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
