<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/soc/xilinx, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2019-02-12T12:38:16Z</updated>
<entry>
<title>drivers: soc: xilinx: Add ZynqMP power domain driver</title>
<updated>2019-02-12T12:38:16Z</updated>
<author>
<name>Jolly Shah</name>
<email>jolly.shah@xilinx.com</email>
</author>
<published>2019-02-01T22:08:50Z</published>
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<id>urn:sha1:e23d9c6d0d4912fab12cd2d56070b0a8199772f0</id>
<content type='text'>
The zynqmp-genpd driver communicates the usage requirements
for logical power domains / devices to the platform FW.
FW is responsible for choosing appropriate power states,
taking Linux' usage information into account.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>drivers: soc: xilinx: Add ZynqMP PM driver</title>
<updated>2019-02-12T12:36:24Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2019-01-29T20:38:21Z</published>
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<id>urn:sha1:ab272643d723f531b9caa8a4ac5f85fcd26840d2</id>
<content type='text'>
Add ZynqMP PM driver. PM driver provides power management
support for ZynqMP.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: Fix Kconfig alignment</title>
<updated>2018-01-16T14:50:21Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-01-16T07:36:09Z</published>
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<id>urn:sha1:056b54eeaebbe567076fe9e824643fc330cba4d5</id>
<content type='text'>
Tabs should be used for alignment instead of spaces.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: xlnx_vcu: Use bitwise &amp; rather than logical &amp;&amp; on clkoutdiv</title>
<updated>2018-01-16T14:50:20Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>garsilva@embeddedor.com</email>
</author>
<published>2018-01-15T19:15:28Z</published>
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<id>urn:sha1:2a7157b137f6f4804fbd60e8734574373212105b</id>
<content type='text'>
Currently clkoutdiv is being operated on by a logical &amp;&amp; operator rather
than a bitwise &amp; operator. This looks incorrect as these should be bit
flag operations.

Addresses-Coverity-ID: 1463959 ("Logical vs. bitwise operator")
Fixes: cee8113a295a ("soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver")
Signed-off-by: Gustavo A. R. Silva &lt;garsilva@embeddedor.com&gt;
Acked-by: Dhaval Shah &lt;dshah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu</title>
<updated>2018-01-16T07:34:30Z</updated>
<author>
<name>Dhaval Shah</name>
<email>dhaval.shah@xilinx.com</email>
</author>
<published>2018-01-16T06:34:48Z</published>
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<id>urn:sha1:05015061222d10a3cb87e6046940abfe42114927</id>
<content type='text'>
xlnx_vcu driver uses devm_ioremap_nocache, which is included
only when HAS_IOMEM is enabled.

drivers/soc/xilinx/xlnx_vcu.o: In function `xvcu_probe':
   xlnx_vcu.c:(.text+0x116): undefined reference to `devm_ioremap_nocache'
   xlnx_vcu.c:(.text+0x1ae): undefined reference to `devm_ioremap_nocache'

Signed-off-by: Dhaval Shah &lt;dshah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver</title>
<updated>2018-01-08T12:42:47Z</updated>
<author>
<name>Dhaval Shah</name>
<email>dhaval.shah@xilinx.com</email>
</author>
<published>2017-12-21T18:33:06Z</published>
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<id>urn:sha1:cee8113a295acfc4cd25728d7c3d44e6bc3bbff9</id>
<content type='text'>
Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.

Signed-off-by: Dhaval Shah &lt;dshah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: Create folder structure for soc specific drivers</title>
<updated>2018-01-08T12:42:39Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2017-12-19T13:15:25Z</published>
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<id>urn:sha1:5abcdc206fe8383f1e74d6cbce2f16ff0b121715</id>
<content type='text'>
Create directory structure with Makefile/Kconfig for adding xilinx soc
specific drivers.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
</feed>
