kernel/drivers/soc/tegra, branch linux-4.3.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y2015-08-13T14:49:58Zsoc/tegra: pmc: Use existing pclk reference2015-08-13T14:49:58ZThierry Redingtreding@nvidia.com2015-08-04T13:25:03Zurn:sha1:592431b0369dc7a1f4a68f15ff0c48d94b66297f
The driver requests the pclk clock at probe time already and stores its
reference to it in struct tegra_pmc, so there is no need to look it up
everytime it is needed. Use the existing reference instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: pmc: Remove unnecessary return statement2015-08-13T14:49:43ZThierry Redingtreding@nvidia.com2015-07-03T09:50:27Zurn:sha1:4a4466a6a418b96d6cb07ffb46cefa13df8f12ef
Functions returning no value don't need an explicit return statement.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile2015-08-13T14:17:40ZMasahiro Yamadayamada.masahiro@socionext.com2015-07-31T05:58:21Zurn:sha1:7c9fd23ff12e04f36be5ae5ff5dfe72fb913f215
Kbuild descends into drivers/soc/tegra/ only when CONFIG_ARCH_TEGRA
is enabled. (see drivers/soc/Makefile)
$(CONFIG_ARCH_TEGRA) in drivers/soc/tegra/Makefile always evaluates
to 'y'.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add spare bit offset for Tegra2102015-07-16T08:38:31ZThierry Redingtreding@nvidia.com2015-05-04T14:45:25Zurn:sha1:1dad36cdd5d20b4d7ceca5026553e86b3315b022
The offset of the first spare bit register on Tegra210 is 0x380, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add spare bit offset for Tegra1242015-07-16T08:38:31ZThierry Redingtreding@nvidia.com2015-05-04T14:44:29Zurn:sha1:82df0e5e78d956ea3552f7315a4d559f657047da
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add spare bit offset for Tegra1142015-07-16T08:38:30ZThierry Redingtreding@nvidia.com2015-05-04T14:38:28Zurn:sha1:b23083a9c6829675d367b4f06a64d74ead82eb14
The offset of the first spare bit register on Tegra114 is 0x280, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Rename core_* to soc_*2015-07-16T08:38:29ZThierry Redingtreding@nvidia.com2015-03-23T13:44:08Zurn:sha1:03b3f4c8b76180ba5bd800c57a7efdb142c2341d
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add Tegra210 support2015-07-16T08:38:29ZThierry Redingtreding@nvidia.com2015-04-29T14:55:57Zurn:sha1:0dc5a0d836751099f2e08deec28f56ec881925dd
Add Tegra210 support to the fuses driver and add Tegra210-specific
speedo definitions.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers2015-07-16T08:38:28ZThierry Redingtreding@nvidia.com2015-04-29T14:54:04Zurn:sha1:7e939de1b2bb26496e4967e5346619700245e7c0
Unifying the drivers makes it easier to restrict the legacy probing
paths to 32-bit ARM. This in turn will come in handy as support for
new 64-bit ARM SoCs is added.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Restrict legacy code to 32-bit ARM2015-07-16T08:38:28ZThierry Redingtreding@nvidia.com2015-05-04T11:30:50Zurn:sha1:297c4f3dcbffe11ce899a7d068ea18079094403b
For backwards-compatibility with old device trees, if no APBMISC node
exists this driver hard-codes the I/O memory region. All 64-bit ARM
device tree files are recent enough that they can be required to have
this node, and therefore the legacy code path is not required.
Based on work done by Paul Walmsley <pwalmsley@nvidia.com>.
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>