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<title>kernel/drivers/reset/Kconfig, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2019-01-28T10:16:04Z</updated>
<entry>
<title>reset: imx7: Add support for i.MX8MQ IP block variant</title>
<updated>2019-01-28T10:16:04Z</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-01-22T02:10:43Z</published>
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<id>urn:sha1:c979dbf59987f4114fdbd491c8ad254343a430fd</id>
<content type='text'>
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.

Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Cc: "A.s. Dong" &lt;aisheng.dong@nxp.com&gt;
Cc: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
[p.zabel@pengutronix.de: fixed whitespace alignment]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add Broadcom STB SW_INIT reset controller driver</title>
<updated>2019-01-28T10:16:04Z</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2019-01-23T22:54:36Z</published>
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<id>urn:sha1:77750bc089e4508ff62f036e6e6626cf8d7384cb</id>
<content type='text'>
Add support for resetting blocks through the Linux reset controller
subsystem when reset lines are provided through a SW_INIT-style reset
controller on Broadcom STB SoCs.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: uniphier-usb3: Rename to reset-uniphier-glue</title>
<updated>2019-01-07T15:38:51Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2018-11-09T01:42:05Z</published>
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<id>urn:sha1:3eb8f765f5aeca6e4195246f41e534025f69eee8</id>
<content type='text'>
This driver works for controlling the reset lines including USB3
glue layer, however, this can be applied to other glue layers.
Now this patch renames the driver from "reset-uniphier-usb3" to
"reset-uniphier-glue".

At the same time, this changes CONFIG_RESET_UNIPHIER_USB3 to
CONFIG_RESET_UNIPHIER_GLUE.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: socfpga: add an early reset driver for SoCFPGA</title>
<updated>2019-01-07T15:38:50Z</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2018-11-13T18:50:48Z</published>
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<id>urn:sha1:b3ca9888f35fa6919569cf27c929dc0ac49e9716</id>
<content type='text'>
Create a separate reset driver that uses the reset operations in
reset-simple. The reset driver for the SoCFPGA platform needs to
register early in order to be able bring online timers that needed
early in the kernel bootup.

We do not need this early reset driver for Stratix10, because on
arm64, Linux does not need the timers are that in reset. Linux is
able to run just fine with the internal armv8 timer. Thus, we use
a new binding "altr,stratix10-rst-mgr" for the Stratix10 platform.
The Stratix10 platform will continue to use the reset-simple platform
driver, while the 32-bit platforms(Cyclone5/Arria5/Arria10) will use
the early reset driver.

Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
[p.zabel@pengutronix.de: fixed socfpga of_device_id in reset-simple]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: qcom: PDC Global (Power Domain Controller) reset controller</title>
<updated>2018-10-05T08:33:44Z</updated>
<author>
<name>Sibi Sankar</name>
<email>sibis@codeaurora.org</email>
</author>
<published>2018-08-29T19:12:11Z</published>
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<id>urn:sha1:eea2926b0a390969828e49ea96c45a2b1f007030</id>
<content type='text'>
Add reset controller for SDM845 SoCs to control reset signals provided
by PDC Global for Modem, Compute, Display, GPU, Debug, AOP, Sensors,
Audio, SP and APPS

Signed-off-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: meson: add meson audio arb driver</title>
<updated>2018-07-20T16:17:31Z</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2018-07-20T15:26:33Z</published>
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<id>urn:sha1:d903779b58be442f3afd2c51c46c7cf19c97684e</id>
<content type='text'>
The Amlogic Audio ARB is a simple device which enables or
disables the access of Audio FIFOs to DDR on AXG based SoC.

Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: uniphier: add USB3 core reset control</title>
<updated>2018-07-16T10:15:55Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2018-07-10T01:14:17Z</published>
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<id>urn:sha1:499fef09a3237497906084da3eede0185fc9abb8</id>
<content type='text'>
Add a reset line to enable USB3 core implemented in UniPhier SoCs.

This reuses only the reset operations in reset-simple, because
the reset-simple doesn't handle any SoC-dependent clocks and resets.
This reset line is included in the USB3 glue layer, and it's necessary
to enable clocks and deassert resets of the layer before using this
reset line.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: qcom: AOSS (always on subsystem) reset controller</title>
<updated>2018-07-16T10:15:51Z</updated>
<author>
<name>Sibi Sankar</name>
<email>sibis@codeaurora.org</email>
</author>
<published>2018-06-27T14:24:43Z</published>
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<id>urn:sha1:5ecb065165b90a5745f3a6c3a8a847b530e3afbc</id>
<content type='text'>
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem

Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: stm32mp1: Enable stm32mp1 reset driver</title>
<updated>2018-03-27T08:44:04Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2018-03-19T07:25:51Z</published>
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<id>urn:sha1:197858b68532d415f21a5a92fb6661c67c6c9a97</id>
<content type='text'>
stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register.

Writing '0' on reset SET register has no effect
Writing '1' on reset SET register
	activates the reset of the corresponding peripheral

Writing '0' on reset CLEAR register	has no effect
Writing '1' on reset CLEAR register
	releases the reset of the corresponding peripheral

See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency</title>
<updated>2018-03-27T08:44:02Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2018-03-06T11:15:11Z</published>
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<id>urn:sha1:8fa566206efdef4d3ec7f13bed36302f9969f2ef</id>
<content type='text'>
This config select's MFD_SYSCON, but does not depend on HAS_IOMEM.

Compile testing on architecture without HAS_IOMEM causes "unmet
direct dependencies" in Kconfig phase.

Detected by "make ARCH=score allyesconfig".

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
