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<title>kernel/drivers/powercap, branch linux-5.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.11.y'/>
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<updated>2020-12-15T14:26:14Z</updated>
<entry>
<title>Merge branches 'pm-sleep', 'pm-acpi', 'pm-domains' and 'powercap'</title>
<updated>2020-12-15T14:26:14Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2020-12-15T14:26:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=42b4ca04cbfde952e7be132ffc7226890323bbe1'/>
<id>urn:sha1:42b4ca04cbfde952e7be132ffc7226890323bbe1</id>
<content type='text'>
* pm-sleep:
  PM: sleep: Add dev_wakeup_path() helper
  PM / suspend: fix kernel-doc markup
  PM: sleep: Print driver flags for all devices during suspend/resume

* pm-acpi:
  PM: ACPI: Refresh wakeup device power configuration every time
  PM: ACPI: PCI: Drop acpi_pm_set_bridge_wakeup()
  PM: ACPI: reboot: Use S5 for reboot

* pm-domains:
  PM: domains: create debugfs nodes when adding power domains
  PM: domains: replace -ENOTSUPP with -EOPNOTSUPP

* powercap:
  powercap: Adjust printing the constraint name with new line
  powercap: RAPL: Add AMD Fam19h RAPL support
  powercap: Add AMD Fam17h RAPL support
  powercap/intel_rapl_msr: Convert rapl_msr_priv into pointer
  x86/msr-index: sort AMD RAPL MSRs by address
</content>
</entry>
<entry>
<title>powercap: Adjust printing the constraint name with new line</title>
<updated>2020-11-23T17:27:58Z</updated>
<author>
<name>Lukasz Luba</name>
<email>lukasz.luba@arm.com</email>
</author>
<published>2020-11-17T13:47:59Z</published>
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<id>urn:sha1:b4ba76fb1c999384c1b0840d216d42abcd611024</id>
<content type='text'>
The constrain name has limit of size 30, which sometimes might be hit.
When this happens the new line might get lost. Prevent this and set the
max limit for name string length equal 29. This would result is proper
string clamping (when needed) and storing '\n' at index 29 and '\0' at 30,
so similarly as desired originally.

Signed-off-by: Lukasz Luba &lt;lukasz.luba@arm.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: RAPL: Add AMD Fam19h RAPL support</title>
<updated>2020-11-10T18:59:07Z</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@amd.com</email>
</author>
<published>2020-10-27T07:23:57Z</published>
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<id>urn:sha1:8a9d881f22d7a0e06a46a326d0880fb45a06d3b5</id>
<content type='text'>
AMD Family 19h's RAPL MSRs are identical to Family 17h's.  Extend
Family 17h's support to Family 19h.

Signed-off-by: Kim Phillips &lt;kim.phillips@amd.com&gt;
Signed-off-by: Victor Ding &lt;victording@google.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: Add AMD Fam17h RAPL support</title>
<updated>2020-11-10T18:59:07Z</updated>
<author>
<name>Victor Ding</name>
<email>victording@google.com</email>
</author>
<published>2020-10-27T07:23:56Z</published>
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<id>urn:sha1:43756a298928c9a4e8201baaeb205c0c103728af</id>
<content type='text'>
Enable AMD Fam17h RAPL support for the power capping framework.

The support is as per AMD Fam17h Model31h (Zen2) and model 00-ffh
(Zen1) PPR.

Tested by comparing the results of following two sysfs entries and the
values directly read from corresponding MSRs via /dev/cpu/[x]/msr:
  /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj
  /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj

Signed-off-by: Victor Ding &lt;victording@google.com&gt;
Acked-by: Kim Phillips &lt;kim.phillips@amd.com&gt;
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap/intel_rapl_msr: Convert rapl_msr_priv into pointer</title>
<updated>2020-11-10T18:59:06Z</updated>
<author>
<name>Victor Ding</name>
<email>victording@google.com</email>
</author>
<published>2020-10-27T07:23:55Z</published>
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<id>urn:sha1:a2c32fa736a590a7ab6e9601066a6772ae09869b</id>
<content type='text'>
Changes the static struct rapl_msr_priv to a pointer to allow using
a different RAPL MSR interface, preparing for supporting AMD's RAPL
MSR interface.

No functional changes.

Signed-off-by: Victor Ding &lt;victording@google.com&gt;
Acked-by: Kim Phillips &lt;kim.phillips@amd.com&gt;
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux</title>
<updated>2020-11-10T18:02:31Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-11-10T18:02:31Z</published>
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<id>urn:sha1:8bff39bfdc30c9bd6e152eb88a0bd6dd35bdd760</id>
<content type='text'>
Pull turbostat updates from Len Brown:
 "Update update to version 20.09.30, one kernel side fix"

* 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
  tools/power turbostat: update version number
  powercap: restrict energy meter to root access
  tools/power turbostat: harden against cpu hotplug
  tools/power turbostat: adjust for temperature offset
  tools/power turbostat: Build with _FILE_OFFSET_BITS=64
  tools/power turbostat: Support AMD Family 19h
  tools/power turbostat: Remove empty columns for Jacobsville
  tools/power turbostat: Add a new GFXAMHz column that exposes gt_act_freq_mhz.
  tools/power x86_energy_perf_policy: Input/output error in a VM
  tools/power turbostat: Skip pc8, pc9, pc10 columns, if they are disabled
  tools/power turbostat: Support additional CPU model numbers
  tools/power turbostat: Fix output formatting for ACPI CST enumeration
  tools/power turbostat: Replace HTTP links with HTTPS ones: TURBOSTAT UTILITY
  tools/power turbostat: Use sched_getcpu() instead of hardcoded cpu 0
  tools/power turbostat: Enable accumulate RAPL display
  tools/power turbostat: Introduce functions to accumulate RAPL consumption
  tools/power turbostat: Make the energy variable to be 64 bit
  tools/power turbostat: Always print idle in the system configuration header
  tools/power turbostat: Print /dev/cpu_dma_latency
</content>
</entry>
<entry>
<title>powercap: restrict energy meter to root access</title>
<updated>2020-11-10T16:40:57Z</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2020-11-10T21:00:00Z</published>
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<id>urn:sha1:949dd0104c496fa7c14991a23c03c62e44637e71</id>
<content type='text'>
Remove non-privileged user access to power data contained in
/sys/class/powercap/intel-rapl*/*/energy_uj

Non-privileged users currently have read access to power data and can
use this data to form a security attack. Some privileged
drivers/applications need read access to this data, but don't expose it
to non-privileged users.

For example, thermald uses this data to ensure that power management
works correctly. Thus removing non-privileged access is preferred over
completely disabling this power reporting capability with
CONFIG_INTEL_RAPL=n.

Fixes: 95677a9a3847 ("PowerCap: Fix mode for energy counter")

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>powercap/intel_rapl: remove unneeded semicolon</title>
<updated>2020-11-02T17:04:34Z</updated>
<author>
<name>Tom Rix</name>
<email>trix@redhat.com</email>
</author>
<published>2020-11-01T14:11:29Z</published>
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<id>urn:sha1:a8193af7ec0db73c0c86d02a5d5ffc1dc2ab4e88</id>
<content type='text'>
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap: Fix typo in Kconfig "Plance" -&gt; "Plane"</title>
<updated>2020-10-19T15:40:53Z</updated>
<author>
<name>Hubert Jasudowicz</name>
<email>hubert.jasudowicz@gmail.com</email>
</author>
<published>2020-10-18T15:21:06Z</published>
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<id>urn:sha1:f8fee6e63e55a7fc0e53a460ae3523d9e4d9bd48</id>
<content type='text'>
Signed-off-by: Hubert Jasudowicz &lt;hubert.jasudowicz@gmail.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>powercap/intel_rapl: enumerate Psys RAPL domain together with package RAPL domain</title>
<updated>2020-10-16T15:35:36Z</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2020-10-13T07:42:41Z</published>
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<id>urn:sha1:f1e8d7560d3051b38f73a0cf6acc1b0bf5305ad9</id>
<content type='text'>
On multi-package systems, the Psys MSR is only valid for CPUs on
specific package (master package). The current code makes the
assumption that package 0 is the master package, but this is not
true on new platforms like SPR.

Fix the problem by emuerating the Psys RAPL domain for every
package, so CPUs in slave packages will read 0 for the Psys energy
counter and only CPUs in master packages can get a valid reading
and register the Psys RAPL domain.

The sysfs I/F for the Psys RAPL domain is not changed.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
[ rjw: Subject and changelog edits ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
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