<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/platform/x86/intel/pmc, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2024-03-12T10:56:04Z</updated>
<entry>
<title>platform/x86/intel/pmc: Improve PKGC residency counters debug</title>
<updated>2024-03-12T10:56:04Z</updated>
<author>
<name>Kane Chen</name>
<email>kane.chen@intel.com</email>
</author>
<published>2024-03-08T03:31:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=16f8091b49175f327120cdbbdde135d38a853ae1'/>
<id>urn:sha1:16f8091b49175f327120cdbbdde135d38a853ae1</id>
<content type='text'>
The current code only prints PKGC-10 residency when the PKGC-10
is not reached in previous 'freeze' attempt. To debug PKGC-10 issues, we
also need to know other PKGC residency counters to better triage issues.
Ex:
1. When system is stuck in PC2, it can be caused short LTR from device.
2. When system is stuck in PC8, it can be caused by display engine.

To better triage issues, all PKGC residency are needed when issues happen.

Example log:
 CPU did not enter Package C10!!! (Package C10 cnt=0x0)
 Prev Package C2 cnt = 0x2191a325de, Current Package C2 cnt = 0x21aba30724
 Prev Package C3 cnt = 0x0, Current Package C3 cnt = 0x0
 Prev Package C6 cnt = 0x0, Current Package C6 cnt = 0x0
 Prev Package C7 cnt = 0x0, Current Package C7 cnt = 0x0
 Prev Package C8 cnt = 0x0, Current Package C8 cnt = 0x0
 Prev Package C9 cnt = 0x0, Current Package C9 cnt = 0x0
 Prev Package C10 cnt = 0x0, Current Package C10 cnt = 0x0

With this log, we can know whether it's a stuck PC2 issue, and we can
check whether the short LTR from device causes the issue.

Signed-off-by: Kane Chen &lt;kane.chen@intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240308033127.1013053-1-kane.chen@intel.com
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc/arl: Put GNA device in D3</title>
<updated>2024-03-12T10:47:53Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2024-02-27T19:01:34Z</published>
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<id>urn:sha1:ac2d1fd9688fcdfba5acc815fb2b13fec83e5dad</id>
<content type='text'>
As is the case on Meteor Lake, the Gaussian &amp; Neural Accelerator (GNA)
device is powered by BIOS to D0 by default. If no driver is loaded, this
will cause the Package C state to be limited to PC2, leading to
significant power consumption and decrease in batter life.  Put the GNA
device in D3 by default if no driver is loaded for it.

Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Reviewed-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240227190134.1592072-3-david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc/lnl: Remove SSRAM support</title>
<updated>2024-03-12T10:47:51Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2024-02-27T19:01:33Z</published>
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<id>urn:sha1:e6ba4acde44957dc9bdc3222b5739217a102752d</id>
<content type='text'>
A recent PMC firmware change in Lunar Lake caused the pmc_core driver to
fail to probe. This is due to a change in the GUID for PMC telemetry coming
from the SSRAM device. Until a final release is ready this value may
change again. In the meantime, disable the SSRAM support for Lunar Lake so
the driver can load and provide some basic functionality.

Fixes: 3748dfdae2a6 ("platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driver")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240227190134.1592072-2-david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Add missing extern</title>
<updated>2024-01-02T12:26:31Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:48Z</published>
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<id>urn:sha1:669f157fd7ad987dd5beba46576ec357f4d6c686</id>
<content type='text'>
Add missing extern for tgl_h_reg_map. Fixes sparse warning:

  drivers/platform/x86/intel/pmc/tgl.c:213:26: warning: symbol 'tgl_h_reg_map' was not declared. Should it be static?

Fixes: 544f7b7f651c ("platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH")
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-9-david.e.box@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc/lnl: Add GBE LTR ignore during suspend</title>
<updated>2024-01-02T12:26:28Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6f9fac5535ba2038063c656f0afb496d7f87bcc1'/>
<id>urn:sha1:6f9fac5535ba2038063c656f0afb496d7f87bcc1</id>
<content type='text'>
Add the GBE LTR ignore suspend time fix for Lunar Lake.

Fixes: 119652b855e6 ("platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driver")
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-8-david.e.box@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc/arl: Add GBE LTR ignore during suspend</title>
<updated>2024-01-02T12:26:20Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:46Z</published>
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<id>urn:sha1:10ed9ee0af5a6cab8b36b301865417a288179b06</id>
<content type='text'>
Add the GBE LTR ignore suspend time fix for Arrow Lake.

Fixes: f34dcf397286 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver")
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-7-david.e.box@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-next</title>
<updated>2024-01-02T12:13:01Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2024-01-02T12:13:01Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2ad815797ef01136091e502944e05b6794b9e5b8'/>
<id>urn:sha1:2ad815797ef01136091e502944e05b6794b9e5b8</id>
<content type='text'>
Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next
so that the "Intel PMC GBE LTR regression" fixes can also be
applied to the new Arrow Lake and Lunar Lake platform support
code in pdx86/for-next .
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Move GBE LTR ignore to suspend callback</title>
<updated>2023-12-29T13:31:22Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:45Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=70681aa0746ae61d7668b9f651221fad5e30c71e'/>
<id>urn:sha1:70681aa0746ae61d7668b9f651221fad5e30c71e</id>
<content type='text'>
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added at probe. This was needed in order to allow the
SoC to enter the deepest Package C state. To fix the regression and at
least support PC10 during suspend, move the LTR ignore from probe to the
suspend callback, and enable it again on resume. This solution will allow
PC10 during suspend but restrict Package C entry at runtime to no deeper
than PC8/9 while a network cable it attach to the PCH LAN.

Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-6-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Allow reenabling LTRs</title>
<updated>2023-12-29T13:31:15Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:44Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6f9cc5c1f94daa98846b2073733d03ced709704b'/>
<id>urn:sha1:6f9cc5c1f94daa98846b2073733d03ced709704b</id>
<content type='text'>
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added during probe. The fix will move the ignore to
occur at suspend-time (so as to not affect suspend power). This will
require the ability to enable the LTR again on resume. Modify
pmc_core_send_ltr_ignore() to allow enabling an LTR.

Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-5-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Add suspend callback</title>
<updated>2023-12-29T13:31:08Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7c13f365aee68b01e7e68ee293a71fdc7571c111'/>
<id>urn:sha1:7c13f365aee68b01e7e68ee293a71fdc7571c111</id>
<content type='text'>
Add a suspend callback to struct pmc for performing platform specific tasks
before device suspend. This is needed in order to perform GBE LTR ignore on
certain platforms at suspend-time instead of at probe-time and replace the
GBE LTR ignore removal that was done in order to fix a bug introduced by
commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and
core_configure()").

Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-4-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
</feed>
