<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/platform/x86/intel/pmc/mtl.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2024-01-02T12:13:01Z</updated>
<entry>
<title>Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-next</title>
<updated>2024-01-02T12:13:01Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2024-01-02T12:13:01Z</published>
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<id>urn:sha1:2ad815797ef01136091e502944e05b6794b9e5b8</id>
<content type='text'>
Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next
so that the "Intel PMC GBE LTR regression" fixes can also be
applied to the new Arrow Lake and Lunar Lake platform support
code in pdx86/for-next .
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Move GBE LTR ignore to suspend callback</title>
<updated>2023-12-29T13:31:22Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:45Z</published>
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<id>urn:sha1:70681aa0746ae61d7668b9f651221fad5e30c71e</id>
<content type='text'>
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added at probe. This was needed in order to allow the
SoC to enter the deepest Package C state. To fix the regression and at
least support PC10 during suspend, move the LTR ignore from probe to the
suspend callback, and enable it again on resume. This solution will allow
PC10 during suspend but restrict Package C entry at runtime to no deeper
than PC8/9 while a network cable it attach to the PCH LAN.

Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-6-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Allow reenabling LTRs</title>
<updated>2023-12-29T13:31:15Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-12-23T03:25:44Z</published>
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<id>urn:sha1:6f9cc5c1f94daa98846b2073733d03ced709704b</id>
<content type='text'>
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added during probe. The fix will move the ignore to
occur at suspend-time (so as to not affect suspend power). This will
require the ability to enable the LTR again on resume. Modify
pmc_core_send_ltr_ignore() to allow enabling an LTR.

Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231223032548.1680738-5-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Add ssram_init flag in PMC discovery in Meteor Lake</title>
<updated>2023-12-19T15:48:27Z</updated>
<author>
<name>Rajvi Jingar</name>
<email>rajvi.jingar@linux.intel.com</email>
</author>
<published>2023-12-19T04:22:14Z</published>
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<id>urn:sha1:1d62ada48d41d72d72232585eed0f3e1136ae1fb</id>
<content type='text'>
If PMC discovery using pmc_core_ssram_init() was unsuccessful for the
Meteor Lake platform, the legacy enumeration method is used. In this
case pci device struct for the PMC SSRAM is not available
and pmc_core_ssram_get_lpm_reqs() will not work. Add ssram_init flag to
indicate if the PMC SSRAM initialization was successful or not. Call
pmc_core_ssram_get_lpm_reqs() only if the ssram_init flag is set to true.

Signed-off-by: Rajvi Jingar &lt;rajvi.jingar@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231219042216.2592029-6-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Move common code to core.c</title>
<updated>2023-12-19T15:48:24Z</updated>
<author>
<name>Rajvi Jingar</name>
<email>rajvi.jingar@linux.intel.com</email>
</author>
<published>2023-12-19T04:22:13Z</published>
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<id>urn:sha1:d79c3c82ee82cc99ffde4c4f5fe69db35bcfb733</id>
<content type='text'>
Functions like mtl_set_device_d3() and mtl_punit_pmt_init() were added for
Meteor Lake. To be able to use them in Arrow Lake and future platforms,
move them to core.c.

Also, to support different guids, add guid argument in
pmc_core_punit_pmt_init() and to support different PCI function numbers,
add func arg in pmc_core_ssram_init().

Signed-off-by: Rajvi Jingar &lt;rajvi.jingar@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231219042216.2592029-5-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Fix in mtl_punit_pmt_init()</title>
<updated>2023-12-19T15:48:05Z</updated>
<author>
<name>Rajvi Jingar</name>
<email>rajvi.jingar@linux.intel.com</email>
</author>
<published>2023-12-19T04:22:09Z</published>
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<id>urn:sha1:1f5e56c9f6cc92c45d27adfe78fb54c716fed2e2</id>
<content type='text'>
pci_get_domain_bus_and_slot() increases the reference count on the pci
device that is used to register the endpoint. In case of failure in
registration, decrease reference count using pci_dev_put(pcidev) before
returning.

Fixes: 6e7964855381 ("platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake")
Signed-off-by: Rajvi Jingar &lt;rajvi.jingar@linux.intel.com&gt;
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231219042216.2592029-1-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake</title>
<updated>2023-12-04T13:53:43Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-11-29T22:21:32Z</published>
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<id>urn:sha1:6e79648553818bb21021ccf72ae27f4508844818</id>
<content type='text'>
Expose the Die C6 counter on Meteor Lake.

Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231129222132.2331261-21-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P</title>
<updated>2023-12-04T13:53:43Z</updated>
<author>
<name>Xi Pardee</name>
<email>xi.pardee@intel.com</email>
</author>
<published>2023-11-29T22:21:30Z</published>
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<id>urn:sha1:935b8211a31a52c82150b2b83c8428859393860d</id>
<content type='text'>
Add support to read the low power mode requirements for Meteor Lake M and
Meteor Lake P.

Signed-off-by: Xi Pardee &lt;xi.pardee@intel.com&gt;
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231129222132.2331261-19-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/intel/pmc/mtl: Use return value from pmc_core_ssram_init()</title>
<updated>2023-12-04T13:53:43Z</updated>
<author>
<name>David E. Box</name>
<email>david.e.box@linux.intel.com</email>
</author>
<published>2023-11-29T22:21:26Z</published>
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<id>urn:sha1:642dd26f58d91f4bb2e2fcaaf178bbc35369b73a</id>
<content type='text'>
Instead of checking for a NULL regbase, use the return value from
pmc_core_ssram_init() to check if PMC discovery was successful. If not, use
the legacy enumeration method (which only works for the primary PMC).

Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231129222132.2331261-15-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init</title>
<updated>2023-12-04T13:53:43Z</updated>
<author>
<name>Xi Pardee</name>
<email>xi.pardee@intel.com</email>
</author>
<published>2023-11-29T22:21:23Z</published>
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<id>urn:sha1:2e35e3aa9f10ea430468207c3dd9dc33ba1afc33</id>
<content type='text'>
In order to setup a table of low power mode requirements for Meteor Lake,
pmc_core_get_low_power_modes() will need to be run from platform init code
so that the enabled modes are known, allowing the use of the
pmc_for_each_mode helper. Make the function global and call it from the
platform init code.

Signed-off-by: Xi Pardee &lt;xi.pardee@intel.com&gt;
Signed-off-by: David E. Box &lt;david.e.box@linux.intel.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231129222132.2331261-12-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
</feed>
