<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/platform/x86/amd/pmc/pmc.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2024-01-02T12:40:31Z</updated>
<entry>
<title>platform/x86/amd/pmc: Modify SMU message port for latest AMD platform</title>
<updated>2024-01-02T12:40:31Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:21:04Z</published>
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<id>urn:sha1:236f7d8034ff401d02fa6d74bae494a2b54e1834</id>
<content type='text'>
The latest platforms use a different SMU message port(0x938) from the one
currently being used (0x538). Make code changes to adapt to this new
information.

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-7-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Add 1Ah family series to STB support list</title>
<updated>2024-01-02T12:40:29Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:21:03Z</published>
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<id>urn:sha1:d33e992ec87a7a7b1839fac38573d2c0721569f9</id>
<content type='text'>
AMD newer platforms, (AMDI000A or family 1Ah series) also supports the STB
functionality. Add this to amd_pmc_is_stb_supported().

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-6-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Add idlemask support for 1Ah family</title>
<updated>2024-01-02T12:40:27Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:21:02Z</published>
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<id>urn:sha1:9ae57d88609d2077a8340d316fc9849a601844f9</id>
<content type='text'>
Idlemask is an indication of each IP block current state (i.e. whether it
is running or idle) during s2idle transistion. The newer 1Ah family
supports this feature, add it to the support list.

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-5-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: call amd_pmc_get_ip_info() during driver probe</title>
<updated>2024-01-02T12:40:24Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:21:01Z</published>
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<id>urn:sha1:13313c135266ed62d33f43281fb22289865064fd</id>
<content type='text'>
In the current code, amd_pmc_get_ip_info() is being called from
amd_pmc_s2d_init() and that code block gets enabled only when the STB is
being enabled.

But the information from amd_pmc_get_ip_info() will be required outside of
STB usecase. Hence move this call into driver probe sequence.

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-4-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Add VPE information for AMDI000A platform</title>
<updated>2024-01-02T12:40:22Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:21:00Z</published>
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<id>urn:sha1:d8fb50fe6c5c3632079a1642afdd87d30e0d1bbe</id>
<content type='text'>
Latest AMD SoCs has VPE (Video Processing Engine) IP block and the
statistics related to this IP can be obtained as a part of metrics table
information that the PMFW propogates. Add this support for 1Ah family
series.

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-3-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Send OS_HINT command for AMDI000A platform</title>
<updated>2024-01-02T12:40:13Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-12-28T10:20:59Z</published>
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<id>urn:sha1:9efa2a04ce7c827bf265c8963b38553306a8225e</id>
<content type='text'>
To initiate the HW deep state transistion the OS_HINT command has to be
sent the PMFW. Add this support to the platforms that has AMDI000A
support.

Signed-off-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231228102104.1785383-2-Shyam-sundar.S-k@amd.com
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Move keyboard wakeup disablement detection to pmc-quirks</title>
<updated>2023-12-18T13:08:17Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-12-12T04:50:05Z</published>
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<id>urn:sha1:b614a4bd73efeddc2b20d9e6deb6c2710373802b</id>
<content type='text'>
Other platforms may need to disable keyboard wakeup besides Cezanne,
so move the detection into amd_pmc_quirks_init() where it may be applied
to multiple platforms.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20231212045006.97581-4-mario.limonciello@amd.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Only run IRQ1 firmware version check on Cezanne</title>
<updated>2023-12-18T13:08:16Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-12-12T04:50:04Z</published>
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<id>urn:sha1:2d53c0ab61e62302d7b62d660fe76de2bff6bf45</id>
<content type='text'>
amd_pmc_wa_czn_irq1() only runs on Cezanne platforms currently but
may be extended to other platforms in the future.  Rename the function
and only check platform firmware version when it's called for a Cezanne
based platform.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20231212045006.97581-3-mario.limonciello@amd.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: Move platform defines to header</title>
<updated>2023-12-18T13:08:13Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-12-12T04:50:03Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=85980669a863514dd47761efd6c1bc4677a2ae08'/>
<id>urn:sha1:85980669a863514dd47761efd6c1bc4677a2ae08</id>
<content type='text'>
The platform defines will be used by the quirks in the future,
so move them to the common header to allow use by both source
files.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20231212045006.97581-2-mario.limonciello@amd.com
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>platform/x86/amd/pmc: adjust getting DRAM size behavior</title>
<updated>2023-11-17T10:04:01Z</updated>
<author>
<name>Shyam Sundar S K</name>
<email>Shyam-sundar.S-k@amd.com</email>
</author>
<published>2023-11-16T17:01:21Z</published>
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<id>urn:sha1:c6ea14d557343cd3af6c6be2f5a78c98bdb281bb</id>
<content type='text'>
amd_pmc_get_dram_size() is used to get the DRAM size information. But
in the current code, mailbox command to get the DRAM size info is sent
based on the values of dev-&gt;major and dev-&gt;minor.

But dev-&gt;major and dev-&gt;minor will have either junk or zero assigned to
them until at least once a call to amd_pmc_get_smu_version() is made
which ideally populates dev-&gt;major and dev-&gt;minor.

However, adding a amd_pmc_get_smu_version() call to
amd_pmc_get_dram_size() has a downside of elevating the boot times.

After talking to the PMFW team, it's understood that the "get dram
size" mbox command would only be supported on specific platforms (like
Mendocino) and not all. So, adjust getting DRAM size behavior such
that,

- if running on Rembrandt or Mendocino and the underlying PMFW knows
how to execute the "get dram size" command it shall give the custom
dram size.

- if the underlying FW does not report the dram size, we just proceed
further and assign the default dram size.

The simplest way to address this is to remove amd_pmc_get_dram_size()
function and directly call the "get dram size" command in the
amd_pmc_s2d_init().

Reported-by: Mark Hasemeyer &lt;markhas@chromium.org&gt;
Fixes: be8325fb3d8c ("platform/x86/amd: pmc: Get STB DRAM size from PMFW")
Cc: stable@vger.kernel.org
Suggested-by: Sanket Goswami &lt;Sanket.Goswami@amd.com&gt;
Signed-off-by: Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;
Link: https://lore.kernel.org/r/20231116170121.3372222-1-Shyam-sundar.S-k@amd.com
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
</content>
</entry>
</feed>
