kernel/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c, branch linux-4.3.y

Merge tag 'pinctrl-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2015-06-25T02:21:02Z

Pull pin control updates from Linus Walleij: "Here is the bulk of pin control changes for the v4.2 series: Quite a lot of new SoC subdrivers and two new main drivers this time, apart from that business as usual. Details: Core functionality: - Enable exclusive pin ownership: it is possible to flag a pin controller so that GPIO and other functions cannot use a single pin simultaneously. New drivers: - NXP LPC18xx System Control Unit pin controller - Imagination Pistachio SoC pin controller New subdrivers: - Freescale i.MX7d SoC - Intel Sunrisepoint-H PCH - Renesas PFC R8A7793 - Renesas PFC R8A7794 - Mediatek MT6397, MT8127 - SiRF Atlas 7 - Allwinner A33 - Qualcomm MSM8660 - Marvell Armada 395 - Rockchip RK3368 Cleanups: - A big cleanup of the Marvell MVEBU driver rectifying it to correspond to reality - Drop platform device probing from the SH PFC driver, we are now a DT only shop for SuperH - Drop obsolte multi-platform check for SH PFC - Various janitorial: constification, grammar etc Improvements: - The AT91 GPIO portions now supports the set_multiple() feature - Split out SPI pins on the Xilinx Zynq - Support DTs without specific function nodes in the i.MX driver" * tag 'pinctrl-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits) pinctrl: rockchip: add support for the rk3368 pinctrl: rockchip: generalize perpin driver-strength setting pinctrl: sh-pfc: r8a7794: add SDHI pin groups pinctrl: sh-pfc: r8a7794: add MMCIF pin groups pinctrl: sh-pfc: add R8A7794 PFC support pinctrl: make pinctrl_register() return proper error code pinctrl: mvebu: armada-39x: add support for Armada 395 variant pinctrl: mvebu: armada-39x: add missing SATA functions pinctrl: mvebu: armada-39x: add missing PCIe functions pinctrl: mvebu: armada-38x: add ptp functions pinctrl: mvebu: armada-38x: add ua1 functions pinctrl: mvebu: armada-38x: add nand functions pinctrl: mvebu: armada-38x: add sata functions pinctrl: mvebu: armada-xp: add dram functions pinctrl: mvebu: armada-xp: add nand rb function pinctrl: mvebu: armada-xp: add spi1 function pinctrl: mvebu: armada-39x: normalize ref clock naming pinctrl: mvebu: armada-xp: rename spi to spi0 pinctrl: mvebu: armada-370: align spi1 clock pin naming pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet ...

pinctrl: make pinctrl_register() return proper error code

2015-06-10T12:49:52Z

Currently, pinctrl_register() just returns NULL on error, so the callers can not know the exact reason of the failure. Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some -ENOMEM on error of pinctrl_register(), although the error code might be different from the real cause of the error. This commit reworks pinctrl_register() to return the appropriate error code and modifies all of the pinctrl drivers to use IS_ERR() for the error checking and PTR_ERR() for getting the error code. Signed-off-by: Masahiro Yamada Acked-by: Patrice Chotard Acked-by: Thierry Reding Acked-by: Heiko Stuebner Tested-by: Mika Westerberg Acked-by: Mika Westerberg Acked-by: Lee Jones Acked-by: Sören Brinkmann Acked-by: Laurent Pinchart Acked-by: Ray Jui Acked-by: Antoine Tenart Acked-by: Hongzhou Yang Acked-by: Wei Chen Signed-off-by: Linus Walleij

Merge tag 'gpio-v4.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

2015-05-09T02:42:59Z

Pull GPIO fixes from Linus Walleij: "Here is a bunch of GPIO fixes that I collected since -rc1, nothing controversial, nothing special: - fix a memory leak for GPIO hotplug. - fix a signedness bug in the ACPI GPIO pin validation. - driver fixes: Qualcomm SPMI and OMAP MPUIO IRQ issues" * tag 'gpio-v4.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio: omap: Fix regression for MPUIO interrupts gpio: sysfs: fix memory leaks and device hotplug pinctrl: qcom-spmi-gpio: Fix input value report pinctrl: qcom-spmi-gpio: Fix output type configuration gpiolib: change gpio pin from unsigned to signed in acpi callback

pinctrl: qcom-spmi-gpio: Fix input value report

2015-04-28T12:51:45Z

Read input buffer when input is enabled, not when it is disabled. Also fix interpretation of the pmic_gpio_read() return code, negative value means an error. Signed-off-by: Ivan T. Ivanov Reviewed-by: Bjorn Andersson Signed-off-by: Linus Walleij

pinctrl: qcom-spmi-gpio: Fix output type configuration

2015-04-28T12:51:11Z

GPIO output type configuration was incorrectly overwritten by strength value. Fix this. Signed-off-by: Ivan T. Ivanov Acked-by: Bjorn Andersson Signed-off-by: Linus Walleij

pinctrl: qcom-spmi: Fix pin direction configuration

2015-04-27T13:33:42Z

Pin direction configuration was incorrectly overwritten by output and function values in set_mux(). Fix this. Signed-off-by: Ivan T. Ivanov Signed-off-by: Linus Walleij

pinctrl: Add support for PM8916 GPIO's and MPP's

2015-04-08T15:00:18Z

Add compatible string definitions and supported pin functions. Signed-off-by: Ivan T. Ivanov Acked-by: Bjorn Andersson Signed-off-by: Linus Walleij

pinctrl: hide PCONFDUMP in #ifdef

2015-01-30T13:30:59Z

The zynq and qcom-spmi pinctrl drivers both use pin_config_item arrays to provide extra interfaces in debugfs. This structure and the PCONFDUMP macro are not defined if CONFIG_DEBUG_FS is turned off, so we get build errors like: pinctrl/qcom/pinctrl-spmi-gpio.c:139:37: error: array type has incomplete element type static const struct pin_config_item pmic_conf_items[ARRAY_SIZE(pmic_gpio_bindings)] = { ^ pinctrl/qcom/pinctrl-spmi-gpio.c:140:2: error: implicit declaration of function 'PCONFDUMP' [-Werror=implicit-function-declaration] PCONFDUMP(PMIC_GPIO_CONF_PULL_UP, "pull up strength", NULL, true), ^ pinctrl/qcom/pinctrl-spmi-gpio.c:139:37: warning: 'pmic_conf_items' defined but not used [-Wunused-variable] static const struct pin_config_item pmic_conf_items[ARRAY_SIZE(pmic_gpio_bindings)] = { Lacking any better idea to solve this nicely, this patch uses #ifdef to hide the structures, just like the pinctrl core does. Signed-off-by: Arnd Bergmann Signed-off-by: Linus Walleij

pinctrl: pinconf-generic: loose DT dependence

2015-01-14T13:21:38Z

New pin controllers such as ACPI-based may also have custom properties to parse, and should be able to use generic pin config. Let's make the code compile on !OF systems and rename members a bit to underscore it is custom parameters and not necessarily DT parameters. This fixes a build regression for x86_64 on the zeroday kernel builds. Reported-by: kbuild test robot Reviewed-and-tested-by: Soren Brinkmann Signed-off-by: Linus Walleij

pinctrl: qcom-spmi-gpio: Migrate to pinconf-generic

2015-01-14T13:10:09Z

Instead of the driver caring about implementation details like device tree, just provide information about driver specific pinconf parameters to pinconf-generic which takes care of parsing the DT. Signed-off-by: Soren Brinkmann Tested-by: Ivan T. Ivanov Signed-off-by: Linus Walleij