<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pinctrl/qcom/pinctrl-msm.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2025-11-12T12:41:34Z</updated>
<entry>
<title>pinctrl: qcom: msm: Fix deadlock in pinmux configuration</title>
<updated>2025-11-12T12:41:34Z</updated>
<author>
<name>Praveen Talari</name>
<email>praveen.talari@oss.qualcomm.com</email>
</author>
<published>2025-11-10T10:10:41Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1c2e70397b4125022dba80f6111271a37fb36bae'/>
<id>urn:sha1:1c2e70397b4125022dba80f6111271a37fb36bae</id>
<content type='text'>
Replace disable_irq() with disable_irq_nosync() in msm_pinmux_set_mux()
to prevent deadlock when wakeup IRQ is triggered on the same
GPIO being reconfigured.

The issue occurs when a wakeup IRQ is triggered on a GPIO and the IRQ
handler attempts to reconfigure the same GPIO's pinmux. In this scenario,
msm_pinmux_set_mux() calls disable_irq() which waits for the currently
running IRQ handler to complete, creating a circular dependency that
results in deadlock.

Using disable_irq_nosync() avoids waiting for the IRQ handler to
complete, preventing the deadlock condition while still properly
disabling the interrupt during pinmux reconfiguration.

Suggested-by: Prasad Sodagudi &lt;prasad.sodagudi@oss.qualcomm.com&gt;
Signed-off-by: Praveen Talari &lt;praveen.talari@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL</title>
<updated>2025-09-08T12:24:20Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2025-09-05T09:21:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=203a83112e097a501fbe12722b6342787497efe0'/>
<id>urn:sha1:203a83112e097a501fbe12722b6342787497efe0</id>
<content type='text'>
This generic pin config property is confusingly named so let's
rename it to make things clearer.

There are already drivers in the tree that use PIN_CONFIG_OUTPUT
to *read* the value of an output driven pin, which is a big
semantic confusion for the head: are we then reading the
setting of the output or the actual value/level that is put
out on the pin?

We already have PIN_CONFIG_OUTPUT_ENABLE that turns on driver
buffers for output, so this can by logical conclusion only
drive the voltage level if it should be any different.

But if we read the pin, are we then reading the *setting* of
the output value or the *actual* value we can see on the
line?

If the pin has not first been set into output mode with
PIN_CONFIG_OUTPUT_ENABLE, but is instead in some input mode
or tristate, what will reading this property actually
return?

Reading the current users reading this property it is clear
that what we read is the logical level of the pin as 0 or 1
depending on if it is low or high.

Rename it to PIN_CONFIG_LEVEL so it is crystal clear that
we set or read the voltage level of the pin and nothing else.

Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: make the pinmuxing strict</title>
<updated>2025-09-08T12:23:24Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-09-02T11:59:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cc85cb96e2e4489826e372cde645b7823c435de0'/>
<id>urn:sha1:cc85cb96e2e4489826e372cde645b7823c435de0</id>
<content type='text'>
The strict flag in struct pinmux_ops disallows the usage of the same pin
as a GPIO and for another function. Without it, a rouge user-space
process with enough privileges (or even a buggy driver) can request a
used pin as GPIO and drive it, potentially confusing devices or even
crashing the system. Set it globally for all pinctrl-msm users.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add infrastructure for marking pin functions as GPIOs</title>
<updated>2025-09-08T12:23:07Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-09-02T11:59:23Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b65803da894ca494a985e4392e5539fb8f858a2d'/>
<id>urn:sha1:b65803da894ca494a985e4392e5539fb8f858a2d</id>
<content type='text'>
Add a helper macro that wraps PINCTRL_GPIO_PINFUNCTION() for pinctrl-msm
pin functions and assign the .function_is_gpio() callback in pinmux_ops.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: use generic pin function helpers</title>
<updated>2025-09-08T12:22:50Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-09-02T11:59:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6f6835beab99c770f1cc6de99b3e3b73c333dec7'/>
<id>urn:sha1:6f6835beab99c770f1cc6de99b3e3b73c333dec7</id>
<content type='text'>
With the pinmux core no longer duplicating memory used to store the
struct pinfunction objects in .rodata, we can now use the existing
infrastructure for storing and looking up pin functions in qualcomm
drivers. Remove hand-crafted callbacks.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>treewide: rename GPIO set callbacks back to their original names</title>
<updated>2025-08-07T08:07:06Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-07-17T13:21:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d9d87d90cc0b10cd56ae353f50b11417e7d21712'/>
<id>urn:sha1:d9d87d90cc0b10cd56ae353f50b11417e7d21712</id>
<content type='text'>
The conversion of all GPIO drivers to using the .set_rv() and
.set_multiple_rv() callbacks from struct gpio_chip (which - unlike their
predecessors - return an integer and allow the controller drivers to
indicate failures to users) is now complete and the legacy ones have
been removed. Rename the new callbacks back to their original names in
one sweeping change.

Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: msm: mark certain pins as invalid for interrupts</title>
<updated>2025-06-18T11:56:34Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-06-12T09:14:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=93712205ce2f1fb047739494c0399a26ea4f0890'/>
<id>urn:sha1:93712205ce2f1fb047739494c0399a26ea4f0890</id>
<content type='text'>
On some platforms, the UFS-reset pin has no interrupt logic in TLMM but
is nevertheless registered as a GPIO in the kernel. This enables the
user-space to trigger a BUG() in the pinctrl-msm driver by running, for
example: `gpiomon -c 0 113` on RB2.

The exact culprit is requesting pins whose intr_detection_width setting
is not 1 or 2 for interrupts. This hits a BUG() in
msm_gpio_irq_set_type(). Potentially crashing the kernel due to an
invalid request from user-space is not optimal, so let's go through the
pins and mark those that would fail the check as invalid for the irq chip
as we should not even register them as available irqs.

This function can be extended if we determine that there are more
corner-cases like this.

Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
Cc: stable@vger.kernel.org
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Link: https://lore.kernel.org/20250612091448.41546-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: switch to devm_gpiochip_add_data()</title>
<updated>2025-06-09T08:16:45Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@oss.qualcomm.com</email>
</author>
<published>2025-05-13T18:38:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=56ec63a6e107e724619e61c7e605b49d365dfa07'/>
<id>urn:sha1:56ec63a6e107e724619e61c7e605b49d365dfa07</id>
<content type='text'>
In order to simplify cleanup actions, use devres-enabled version of
gpiochip_add_data().  As the msm_pinctrl_remove() function is now empty,
drop it and all its calls from the corresponding pinctrl drivers.

Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/20250513-pinctrl-msm-fix-v2-3-249999af0fc1@oss.qualcomm.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2025-05-30T16:46:28Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-05-30T16:46:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=eafd95ea74846eda3e3eac6b2bb7f34619d8a6f8'/>
<id>urn:sha1:eafd95ea74846eda3e3eac6b2bb7f34619d8a6f8</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "An especially linear and sparse improvement and new drivers release.
  Nothing exciting. The biggest change in Bartosz changes to make
  gpiochip set/get calls return error codes (something we should have
  fixed ages ago but is now finally getting fixed.)

  Core changes:

   - Add the devres devm_pinctrl_register_mappings() call that can
     register some pin control machine mappings and have them go away
     with the associated device

  New drivers:

   - Support for the Mediatek MT6893 and MT8196 SoCs

   - Support for the Renesas RZ/V2N SoC

   - Support for the NXP Freescale i.MX943 SoC

  Improvements:

   - Per-SoC suspend/resume callbacks in the Samsung drivers

   - Set all pins as input (High-Z) at probe in the MCP23S08 driver

   - Switch most GPIO chips to use the setters/getters with a return
     value

   - EGPIO support in the Qualcomm QCM2290 driver

   - Fix up the number of available GPIO lines in Qualcomm QCS8300 and
     QCS615"

* tag 'pinctrl-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
  pinctrl: freescale: Add support for imx943 pinctrl
  pinctrl: core: add devm_pinctrl_register_mappings()
  pinctrl: remove extern specifier for functions in machine.h
  pinctrl: mediatek: eint: Fix invalid pointer dereference for v1 platforms
  pinctrl: freescale: Enable driver if platform is enabled.
  pinctrl: freescale: Depend imx-scu driver on OF
  pinctrl: armada-37xx: propagate error from armada_37xx_pmx_set_by_name()
  pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get_direction()
  pinctrl: armada-37xx: propagate error from armada_37xx_pmx_gpio_set_direction()
  pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get()
  pinctrl: armada-37xx: propagate error from armada_37xx_gpio_direction_output()
  pinctrl: armada-37xx: set GPIO output value before setting direction
  pinctrl: armada-37xx: use correct OUTPUT_VAL register for GPIOs &gt; 31
  pinctrl: meson: Drop unused aml_pctl_find_group_by_name()
  pinctrl: at91: Fix possible out-of-boundary access
  pinctrl: add stubs for OF-specific pinconf functions
  pinctrl: qcom: correct the ngpios entry for QCS8300
  pinctrl: qcom: correct the ngpios entry for QCS615
  dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300
  dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615
  ...
</content>
</entry>
<entry>
<title>pinctrl: qcom: switch to devm_register_sys_off_handler()</title>
<updated>2025-05-20T21:41:29Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@oss.qualcomm.com</email>
</author>
<published>2025-05-13T18:38:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=41e452e6933d14146381ea25cff5e4d1ac2abea1'/>
<id>urn:sha1:41e452e6933d14146381ea25cff5e4d1ac2abea1</id>
<content type='text'>
Error-handling paths in msm_pinctrl_probe() don't call
a function required to unroll restart handler registration,
unregister_restart_handler(). Instead of adding calls to this function,
switch the msm pinctrl code into using devm_register_sys_off_handler().

Fixes: cf1fc1876289 ("pinctrl: qcom: use restart_notifier mechanism for ps_hold")
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/20250513-pinctrl-msm-fix-v2-2-249999af0fc1@oss.qualcomm.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
