kernel/drivers/pinctrl/qcom/Kconfig.msm, branch linux-rolling-stable

pinctrl: qcom: add the tlmm driver for Kaanapali platforms

2025-10-13T10:26:05Z

Add support for Kaanapali TLMM configuration and control via the pinctrl framework. Signed-off-by: Jingyi Wang Reviewed-by: Bartosz Golaszewski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Linus Walleij

pinctrl: qcom: Add glymur pinctrl driver

2025-09-08T12:56:47Z

Add TLMM pinctrl driver to support pin configuration with pinctrl framework for Glymur SoC. Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Pankaj Patil Signed-off-by: Linus Walleij

pinctrl: qcom: Add Milos pinctrl driver

2025-07-14T15:50:58Z

Add pinctrl driver for TLMM block found in the Milos SoC. Signed-off-by: Luca Weiss Reviewed-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/20250702-sm7635-pinctrl-v2-2-c138624b9924@fairphone.com Signed-off-by: Linus Walleij

pinctrl: qcom: Add test case for TLMM interrupt handling

2025-02-28T08:41:14Z

While looking at the X1E PDC GPIO interrupts it became clear that we're lacking a convenient and accessible way to validate if the TLMM interrupt code performing as expected. This introduces a kunit-based "hack" that relies on pin bias/pull configuration to tickle the interrupt logic in non-connected pins to allow us to evaluate that an expected number of interrupts are delivered. The bias/pull configuration is done with mmio accesses directly from the test code, to avoid having to programmatically acquire and drive the pinconf interface for the test pin. This limits the scalability of the code to targets with a particular register layout, but serves our needs for now. The pin to be used for testing is specified by the tester using the "tlmm-test.gpio" module parameter. Worth mentioning is that some of the test cases currently fails for GPIOs that is not backed by PDC (i.e. "non-wakeup" GPIOs), as lingering latched interrupt state is being delivered at IRQ request time. Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/20250227-tlmm-test-v1-1-d18877b4a5db@oss.qualcomm.com Signed-off-by: Linus Walleij

pinctrl: qcom: msm8917: Add MSM8937 wsa_reset pin

2025-02-26T21:29:59Z

It looks like both 8917 and 8937 are the same except for one pin "wsa_reset". Signed-off-by: Dang Huynh Signed-off-by: Barnabás Czémán Link: https://lore.kernel.org/20250211-msm8937-v1-4-7d27ed67f708@mainlining.org Signed-off-by: Linus Walleij

pinctrl: qcom: Add MSM8917 tlmm pinctrl driver

2024-12-16T14:15:35Z

It is based on MSM8916 driver with the pinctrl definitions from Qualcomm's downstream MSM8917 driver. Signed-off-by: Otto Pflüger Reviewed-by: Dmitry Baryshkov Signed-off-by: Barnabás Czémán Link: https://lore.kernel.org/20241215-msm8917-v9-3-bacaa26f3eef@mainlining.org Signed-off-by: Linus Walleij

pinctrl: qcom: Add sm8750 pinctrl driver

2024-11-13T13:45:58Z

Add TLMM pinctrl driver to support pin configuration with pinctrl framework for sm8750 SoC. Signed-off-by: Melody Olvera Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/20241112002843.2804490-3-quic_molvera@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: add support for TLMM on SAR2130P

2024-10-22T12:43:45Z

Add driver for the pincontrol device as present on the Qualcomm SAR2130P platform. This is based on the msm-5.10 tree, tag KERNEL.PLATFORM.1.0.r4-00400-NEO.0. Co-developed-by: Mayank Grover Signed-off-by: Mayank Grover Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org Signed-off-by: Linus Walleij

pinctrl: qcom: add the tlmm driver for QCS8300 platforms

2024-10-22T12:41:44Z

Add support for QCS8300 TLMM configuration and control via the pinctrl framework. Signed-off-by: Jingyi Wang Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-2-8b8d3957cf1a@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: add the tlmm driver for QCS615 platform

2024-10-01T14:20:16Z

Add support for QCS615 TLMM configuration and control via the pinctrl framework. Signed-off-by: Lijuan Gao Link: https://lore.kernel.org/20240920-add_qcs615_pinctrl_driver-v2-2-e03c42a9d055@quicinc.com Signed-off-by: Linus Walleij