<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pinctrl/pinctrl-tegra.c, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2016-02-05T14:16:43Z</updated>
<entry>
<title>pinctrl: tegra: move Tegra pinctrl drivers to sub-directory</title>
<updated>2016-02-05T14:16:43Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-01-23T15:30:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=25cbac7716be6a8d5c57534645ca472d2e4be1fd'/>
<id>urn:sha1:25cbac7716be6a8d5c57534645ca472d2e4be1fd</id>
<content type='text'>
Tegra has several pinctrl drivers.  Now it is reasonable enough to
move them into drivers/pinctrl/tegra/.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl-tegra: add missing of_node_put</title>
<updated>2015-12-22T12:44:00Z</updated>
<author>
<name>Julia Lawall</name>
<email>Julia.Lawall@lip6.fr</email>
</author>
<published>2015-12-21T16:39:44Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=21a8fe8863199fb7818521548e217646085fe3fd'/>
<id>urn:sha1:21a8fe8863199fb7818521548e217646085fe3fd</id>
<content type='text'>
for_each_child_of_node performs an of_node_get on each iteration, so a
return from the loop requires an of_node_put.

A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):

// &lt;smpl&gt;
@@
local idexpression n;
expression e,e1;
@@

 for_each_child_of_node(e1,n) {
   ...
(
   of_node_put(n);
|
   e = n
|
   return n;
|
+  of_node_put(n);
?  return ...;
)
   ...
 }
// &lt;/smpl&gt;

Signed-off-by: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Only set the gpio range if needed</title>
<updated>2015-08-13T14:24:33Z</updated>
<author>
<name>Tomeu Vizoso</name>
<email>tomeu.vizoso@collabora.com</email>
</author>
<published>2015-07-14T08:29:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9462510ce31e2b91156bdcc33e4c737e6768e5f8'/>
<id>urn:sha1:9462510ce31e2b91156bdcc33e4c737e6768e5f8</id>
<content type='text'>
If the gpio DT node has the gpio-ranges property, the range will be
added by the gpio core and doesn't need to be added by the pinctrl
driver.

By having the gpio-ranges property, we have an explicit dependency from
the gpio node to the pinctrl node and we can stop using the deprecated
pinctrl_add_gpio_range() function.

Signed-off-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: make pinctrl_register() return proper error code</title>
<updated>2015-06-10T12:49:52Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-06-09T04:01:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=323de9efdf3e75d1dfb48003a52e59d6d9d4c7a5'/>
<id>urn:sha1:323de9efdf3e75d1dfb48003a52e59d6d9d4c7a5</id>
<content type='text'>
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Lee Jones &lt;lee@kernel.org&gt;
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Ray Jui &lt;rjui@broadcom.com&gt;
Acked-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Acked-by: Hongzhou Yang &lt;hongzhou.yang@mediatek.com&gt;
Acked-by: Wei Chen &lt;Wei.Chen@csr.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: support nvidia,io-hv DT property</title>
<updated>2015-03-09T17:10:58Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2015-02-24T21:00:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ec654e50c67ad4ba89c9f9f81ccf6f061695e36d'/>
<id>urn:sha1:ec654e50c67ad4ba89c9f9f81ccf6f061695e36d</id>
<content type='text'>
Both nvidia,io-hv and nvidia,rcv-sel represent the fact that a particular
pin's IO buffers are configured to accept "high voltage" input signals.
The TRM for different chips names the register field rcv-sel on older
SoCs and io_hv on newer SoCs. Add the new naming option into the pinctrl
driver so that DT files can use naming consistent with the TRM.

This new property name will be documented in the patch that adds support
for the new SoC.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: some bits move between registers</title>
<updated>2015-03-09T17:10:58Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2015-02-24T21:00:49Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ea623061930ccf6d37b4a09a4e65a26fcf552c22'/>
<id>urn:sha1:ea623061930ccf6d37b4a09a4e65a26fcf552c22</id>
<content type='text'>
Some of the pinmux configuration bits that exist in "drive group"
registers in Tegra30..Tegra124 move to the "pinmux" registers on future
chips. Add a flag to support this.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: clean up after enable refactoring</title>
<updated>2014-09-04T08:05:07Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2014-09-03T11:02:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=03e9f0cac5da6af85758276cb4624caf5911f2b9'/>
<id>urn:sha1:03e9f0cac5da6af85758276cb4624caf5911f2b9</id>
<content type='text'>
commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@sonymobile.com&gt;
Acked-by: Fan Wu &lt;fwu@marvell.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: avoid duplicated calling enable_pinmux_setting for a pin</title>
<updated>2014-07-11T12:08:26Z</updated>
<author>
<name>Fan Wu</name>
<email>fwu@marvell.com</email>
</author>
<published>2014-06-09T01:37:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2243a87d90b42eb38bc281957df3e57c712b5e56'/>
<id>urn:sha1:2243a87d90b42eb38bc281957df3e57c712b5e56</id>
<content type='text'>
What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
  each time pinctrl_select_state is called
2. Remove the HW disable operation in pinmux_disable_setting function.
3. Remove the disable ops in struct pinmux_ops
4. Remove all the disable ops users in current code base.

Notes:
1. Great thanks for the suggestion from Linus, Tony Lindgren and
   Stephen Warren and Everyone that shared comments on this patch.
2. The patch also includes comment fixes from Stephen Warren.

The reason why we do this:
1. To avoid duplicated calling of the enable_setting operation
   without disabling operation inbetween which will let the pin
   descriptor desc-&gt;mux_usecount increase monotonously.
2. The HW pin disable operation is not useful for any of the
   existing platforms.
   And this can be used to avoid the HW glitch after using the
   item #1 modification.

In the following case, the issue can be reproduced:
1. There is a driver that need to switch pin state dynamically,
   e.g. between "sleep" and "default" state
2. The pin setting configuration in a DTS node may be like this:

  component a {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;a_grp_setting &amp;c_grp_setting&gt;;
	pinctrl-1 = &lt;&amp;b_grp_setting &amp;c_grp_setting&gt;;
  }

  The "c_grp_setting" config node is totally identical, maybe like
  following one:

  c_grp_setting: c_grp_setting {
	pinctrl-single,pins = &lt;GPIO48 AF6&gt;;
  }

3. When switching the pin state in the following official pinctrl
   sequence:
	pin = pinctrl_get();
	state = pinctrl_lookup_state(wanted_state);
	pinctrl_select_state(state);
	pinctrl_put();

Test Result:
1. The switch is completed as expected, that is: the device's
   pin configuration is changed according to the description in the
   "wanted_state" group setting
2. The "desc-&gt;mux_usecount" of the corresponding pins in "c_group"
   is increased without being decreased, because the "desc" is for
   each physical pin while the setting is for each setting node
   in the DTS.
   Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
   of enabling "c_grp_setting" in pinctrl-1, the desc-&gt;mux_usecount
   will keep increasing without any chance to be decreased.

According to the comments in the original code, only the setting,
in old state but not in new state, will be "disabled" (calling
pinmux_disable_setting), which is correct logic but not intact. We
still need consider case that the setting is in both old state
and new state. We can do this in the following two ways:

1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
   setting" repeatedly
2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
   actually two setting instances, ahead of enabling them.

Analysis:
1. The solution #2 is better because it can avoid too much
   iteration.
2. If we disable all of the settings in the old state and one of
   the setting(s) exist in the new state, the pins mux function
   change may happen when some SoC vendors defined the
   "pinctrl-single,function-off"
   in their DTS file.
   old_setting =&gt; disabled_setting =&gt; new_setting.
3. In the pinmux framework, when a pin state is switched, the
   setting in the old state should be marked as "disabled".

Conclusion:
1. To Remove the HW disabling operation to above the glitch mentioned
   above.
2. Handle the issue mentioned above by disabling all of the settings
   in old state and then enable the all of the settings in new state.

Signed-off-by: Fan Wu &lt;fwu@marvell.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: print better error messages</title>
<updated>2014-04-22T14:53:43Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-04-14T21:33:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=36e80dca9f7381c12d11cb362427979fe640115c'/>
<id>urn:sha1:36e80dca9f7381c12d11cb362427979fe640115c</id>
<content type='text'>
When an attempt is made to configure an unsupported option on a pin,
print the DT property name of that option, so it's easier to debug
what the problem is.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: remove fsafe from data tables</title>
<updated>2014-04-22T14:50:24Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-04-14T21:33:40Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6240d691be7dfb8bc6be0ff84ac567ea434401a8'/>
<id>urn:sha1:6240d691be7dfb8bc6be0ff84ac567ea434401a8</id>
<content type='text'>
The fsafe value in the pingroup data tables is only used to implement
tegra_pinctrl_disable(). The only reason this function is called is when
dynamically switching between pinmux states, i.e. when disabling the old
state before programming the new state. It's simpler to have the new
target state define the expected value of each pin (and all current DTs
do that). This also gives more flexibility, since it allows individual
boards explicit control over the "inactive" mux function for each pin,
rather than requiring it to be an SoC-specific value. Assuming this, we
can get rid of the fsafe value from the driver completely, thus saving
some more space in the driver tables.

While re-writing the content of tegra124_pingroups[], fix the indentation
to use a TAB instead of spaces.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
