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<title>kernel/drivers/pinctrl/pinctrl-amd.h, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2018-07-29T20:20:15Z</updated>
<entry>
<title>pinctrl/amd: fix gpio irq level in debugfs</title>
<updated>2018-07-29T20:20:15Z</updated>
<author>
<name>Daniel Kurtz</name>
<email>djkurtz@chromium.org</email>
</author>
<published>2018-07-17T01:07:41Z</published>
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<id>urn:sha1:1766e4b7047acf44cdd15aaeb1d63ed76ee78492</id>
<content type='text'>
According to the AMD BKDG, the GPIO ActiveLevel bits (10:9) map to:
 00 Active High
 01 Active Low
 10 Active on both edges iff LevelTrig (bit 8) == 0
 11 Reserved

The current code has a bug where it interprets 00 =&gt; Active Low, and
01 =&gt; Active High.

Fix the bug, restrict "Active on both" to just the edge trigger case, and
refactor a bit to make the logic more readable.

Signed-off-by: Daniel Kurtz &lt;djkurtz@chromium.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl/amd: save pin registers over suspend/resume</title>
<updated>2017-09-12T13:58:45Z</updated>
<author>
<name>Daniel Drake</name>
<email>drake@endlessm.com</email>
</author>
<published>2017-09-11T06:11:56Z</published>
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<id>urn:sha1:79d2c8bede2c93f9432d7da0bc2f76a195c90fc0</id>
<content type='text'>
The touchpad in the Asus laptop models X505BA/BP and X542BA/BP is
unresponsive after suspend/resume. The following error appears during
resume:

  i2c_hid i2c-ELAN1300:00: failed to reset device.

The problem here is that i2c_hid does not notice the interrupt being
generated at this point, because the GPIO is no longer configured
for interrupts.

Fix this by saving pinctrl-amd pin registers during suspend and
restoring them at resume time.

Based on code from pinctrl-intel.

Cc: stable@vger.kernel.org
Signed-off-by: Daniel Drake &lt;drake@endlessm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: amd: make use of raw_spinlock variants</title>
<updated>2017-03-16T15:39:15Z</updated>
<author>
<name>Julia Cartwright</name>
<email>julia@ni.com</email>
</author>
<published>2017-03-09T16:22:04Z</published>
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<id>urn:sha1:229710fecdd805abb753c480778ea0de47cbb1e2</id>
<content type='text'>
The amd pinctrl drivers currently implement an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright &lt;julia@ni.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: amd: Add support for additional GPIO</title>
<updated>2016-12-28T12:26:09Z</updated>
<author>
<name>Shah, Nehal-bakulchandra</name>
<email>Nehal-Bakulchandra.shah@amd.com</email>
</author>
<published>2016-12-06T06:47:48Z</published>
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<id>urn:sha1:3bfd44306c65d073008b9ca8f062249f35576b61</id>
<content type='text'>
This patch adds support for new Bank and adds IRQCHIP_SKIP_SET_WAKE flag.

Reviewed-by: S-k, Shyam-sundar &lt;Shyam-sundar.S-k@amd.com&gt;
Signed-off-by: Nehal Shah &lt;Nehal-bakulchandra.Shah@amd.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Fix inconsistent spinlock of AMD GPIO driver which can be</title>
<updated>2015-04-07T09:36:49Z</updated>
<author>
<name>Ken Xue</name>
<email>Ken.Xue@amd.com</email>
</author>
<published>2015-03-27T09:44:26Z</published>
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<id>urn:sha1:25a853d037a40b7ac2c317adef6442ef92d8407e</id>
<content type='text'>
recognized by static analysis tool smatch. Declare constant
Variables with Sparse's suggestion.

Signed-off-by: Ken Xue &lt;Ken.Xue@amd.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: add AMD GPIO driver support.</title>
<updated>2015-03-18T01:02:21Z</updated>
<author>
<name>Ken Xue</name>
<email>Ken.Xue@amd.com</email>
</author>
<published>2015-03-10T07:02:19Z</published>
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<id>urn:sha1:dbad75dd1f25e0107c643d42774a7f9a8ba85e9b</id>
<content type='text'>
KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.

Signed-off-by: Ken Xue &lt;Ken.Xue@amd.com&gt;
[Moved back to &lt;linux/gpio.h&gt; header]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
