kernel/drivers/pinctrl/intel/pinctrl-intel.h, branch linux-5.1.y

pinctrl: pinctrl-intel: move gpio suspend/resume to noirq phase

2019-06-15T09:53:03Z

[ Upstream commit 2fef32766861c6e171f436ab99c89198cf0ca6e1 ] In current driver, SET_LATE_SYSTEM_SLEEP_PM_OPS is used to install the callbacks for suspend/resume. GPIO pin may be used as the interrupt pin by some device. However, using SET_LATE_SYSTEM_SLEEP_PM_OPS() to install the callbacks, the resume callback is called after resume_device_irqs(). Unintended interrupts may arrive due to resuming device irqs first, but the GPIO controller is not properly restored. Normally, for a SMP system, there are multiple cores, so even when there are unintended interrupts, BSP gets the chance to initialize the GPIO chip soon. But when there is only 1 core is active (other cores are offlined or single core) during resume, it is more easily to observe the unintended interrupts. This patch renames the suspend/resume function by adding suffix "_noirq", and installs the callbacks using SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(). Signed-off-by: Binbin Wu Acked-by: Mika Westerberg Signed-off-by: Andy Shevchenko Signed-off-by: Sasha Levin

pinctrl: intel: Unexport intel_pinctrl_probe()

2018-11-08T15:16:40Z

Since there are no more users, unexport it and make static. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: intel: Convert unsigned to unsigned int

2018-10-03T07:05:21Z

Simple type conversion with no functional change implied. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Move linux/pm.h to the local header

2018-09-18T23:37:19Z

We now using a common macro for PM operations in pin control drivers for Intel SoCs, and since that macro relies on the definition and macro from linux/pm.h header file, it's logical to include it directly in pinctrl-intel.h. Otherwise it's a bit fragile and requires a proper ordering of header inclusion in C files. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Introduce common macro for PM operations

2018-08-31T09:25:23Z

This common macro will simplify the code of pin control drivers for Intel SoCs. Suggested-by: Mika Westerberg Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Introduce intel_pinctrl_probe_by_hid() internal API

2018-08-31T09:25:11Z

Introduce intel_pinctrl_probe_by_hid() internal API to simplify drivers, which are using ACPI _HID to distinguish which SoC data needs to be used when being probed. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Introduce intel_pinctrl_probe_by_uid() internal API

2018-08-31T09:24:37Z

Introduce intel_pinctrl_probe_by_uid() internal API to simplify drivers, which are using ACPI _UID to distinguish which SoC data needs to be used when being probed. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Convert to use SPDX identifier

2018-07-02T13:52:10Z

Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Linus Walleij

pinctrl: intel: Allow custom GPIO base for pad groups

2017-11-29T12:44:52Z

Currently we always have direct mapping between GPIO numbers and the hardware pin numbers. However, there are cases where that's not the case anymore (more about this in the next patch). Instead we need to be able to specify custom GPIO base for certain pad groups. To support this, add a new field (gpio_base) to the pad group structure and update the core Intel pinctrl driver to handle this accordingly. Passing 0 as gpio_base will use direct mapping so the existing drivers do not need to be modified. Passing -1 excludes the whole pad group from having GPIO mapping. Signed-off-by: Mika Westerberg Reviewed-by: Andy Shevchenko Signed-off-by: Linus Walleij

pinctrl: intel: Make offset to interrupt status register configurable

2017-10-31T09:10:24Z

Some GPIO blocks have the interrupt status (GPI_IS) offset different than it normally is, so make it configurable. If no offset is specified we use the default. While there remove two unused constants from the core driver. Signed-off-by: Mika Westerberg Signed-off-by: Linus Walleij