kernel/drivers/pinctrl/freescale, branch linux-5.1.y

pinctrl: imx: fix scu link errors

2019-03-08T12:17:24Z

Currently PINCTRL_IMX8QM and PINCTRL_IMX8QXP will select PINCTRL_IMX_SCU. However, PINCTRL_IMX_SCU may not be valid due to it depends on IMX_MBOX. Then we may meet the following link errors: ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinctrl_sc_ipc_init': pinctrl-scu.c:(.text+0x10): undefined reference to `imx_scu_get_handle' ld: pinctrl-scu.c:(.text+0x10): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_get_handle' ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinconf_get_scu': pinctrl-scu.c:(.text+0xa0): undefined reference to `imx_scu_call_rpc' ld: pinctrl-scu.c:(.text+0xa0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_call_rpc' ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinconf_set_scu': pinctrl-scu.c:(.text+0x1b4): undefined reference to `imx_scu_call_rpc' ld: pinctrl-scu.c:(.text+0x1b4): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_call_rpc' ld: drivers/pinctrl/freescale/pinctrl-imx8qxp.o: in function `imx8qxp_pinctrl_probe': pinctrl-imx8qxp.c:(.text+0x28): undefined reference to `imx_pinctrl_probe' ld: pinctrl-imx8qxp.c:(.text+0x28): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_pinctrl_probe' Rework so that PINCTRL_IMX8QM and PINCTRL_IMX8QXP depends on IMX_SCU as well in case they're wrongly enabled. Suggested-by: Arnd Bergmann Signed-off-by: Anders Roxell Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij

pinctrl: freescale: Add imx8mm pinctrl driver support

2019-01-30T09:35:22Z

Add the pinctrl driver support for i.MX8MM. Signed-off-by: Bai Ping Acked-by: Aisheng Dong Signed-off-by: Linus Walleij

pinctrl: imx: add imx8qm driver

2019-01-11T08:25:01Z

MX8QM contains a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch adds the SCU based MX8QM pinctrl driver. Cc: Linus Walleij Cc: Shawn Guo Cc: Fabio Estevam Cc: Stefan Agner Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij

pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ

2018-12-27T09:39:27Z

The CONFIG_SOC_IMX8MQ will go away, so the dependency can be based on ARCH_MXC && ARM64. Signed-off-by: Abel Vesa Acked-by: Dong Aisheng Reviewed-by: Fabio Estevam Signed-off-by: Linus Walleij

pinctrl: imx-scu: Depend on IMX_SCU

2018-12-27T09:36:30Z

Otherwise building fails with only PINCTRL_IMX_SCU selected: aarch64-linux-gnu-ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinctrl_sc_ipc_init': pinctrl-scu.c:(.text+0x10): undefined reference to `imx_scu_get_handle' aarch64-linux-gnu-ld: pinctrl-scu.c:(.text+0x10): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_get_handle' aarch64-linux-gnu-ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinconf_get_scu': pinctrl-scu.c:(.text+0x64): undefined reference to `imx_scu_call_rpc' aarch64-linux-gnu-ld: pinctrl-scu.c:(.text+0x64): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_call_rpc' aarch64-linux-gnu-ld: drivers/pinctrl/freescale/pinctrl-scu.o: in function `imx_pinconf_set_scu': pinctrl-scu.c:(.text+0x104): undefined reference to `imx_scu_call_rpc' aarch64-linux-gnu-ld: pinctrl-scu.c:(.text+0x104): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `imx_scu_call_rpc' make: *** [Makefile:1038: vmlinux] Error 1 Signed-off-by: Guido Günther Reviewed-by: Fabio Estevam Signed-off-by: Linus Walleij

pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP

2018-12-21T10:23:18Z

ARM64 SoC does not encourage people to add more finegrained SoC config options rather than a single ARCH_ in arch Kconfig. So this patch aims to break the dependency on SOC_IMX8QXP. Cc: Linus Walleij Cc: Fabio Estevam Cc: Stefan Agner Cc: Pengutronix Kernel Team Acked-by: Shawn Guo Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij

pinctrl: imx: fix NO_PAD_CTL setting for MMIO pads

2018-11-19T13:51:42Z

After patch b96eea718bf6 ("pinctrl: fsl: add scu based pinctrl support"), NO_PAD_CTL pads map are not skipped anymore which results in a possible memory corruption. As we actually only need to create config maps for SCU pads and MMIO pads which are not using the default config (a.k.a IMX_NO_PAD_CTL), so let's add a proper check before creating the config maps. And during MMIO pads parsing, we also need update the list_p point as SCU case to ensure the pin data next parsed is correct. Cc: Linus Walleij Fixes: b96eea718bf6 ("pinctrl: fsl: add scu based pinctrl support") Reported-by: Martin Kaiser Suggested-by: Leonard Crestez Signed-off-by: Dong Aisheng Reviewed-by: Martin Kaiser Tested-by: Leonard Crestez Tested-by: Kevin Hilman Signed-off-by: Linus Walleij

pinctrl: fsl: imx7ulp: change to use imx legacy binding

2018-11-09T09:54:29Z

We already had an earlier conclusion that all new i.MX Socs will keep using the legacy i.MX Pinctrl bindings instead of generic pin config. However, MX7ULP generic pin config binding support has already been in tree before that time. Per SoC maintainers' suggestions, in order to get a better consistency for all i.MX devices, we'd like to go back to imx legacy binding for MX7ULP as well. Cc: Linus Walleij Cc: Shawn Guo Cc: Stefan Agner Cc: Sascha Hauer Cc: Fabio Estevam Cc: linux-gpio@vger.kernel.org Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij

pinctrl: imx: add imx8qxp driver

2018-11-05T08:33:32Z

MX8QXP contains a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver. Cc: Linus Walleij Cc: Shawn Guo Cc: Fabio Estevam Cc: Stefan Agner Cc: Pengutronix Kernel Team Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij

pinctrl: fsl: add scu based pinctrl support

2018-11-05T08:33:32Z

Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch classifies the pad settings into two categories: MMIO and SCU. For the original MMIO method, no functional changes except organize them into a few imx_*_mmio() functions. Besides that, we add the SCU based Pad Mux and Pinconf setting support which are implemented in pinctrl-scu.c. Cc: Linus Walleij Cc: Shawn Guo Cc: Fabio Estevam Cc: Stefan Agner Cc: Pengutronix Kernel Team Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij