<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/phy/tegra/xusb-tegra210.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2022-11-07T04:50:25Z</updated>
<entry>
<title>phy: tegra: xusb: Remove usb3 supply</title>
<updated>2022-11-07T04:50:25Z</updated>
<author>
<name>Wayne Chang</name>
<email>waynec@nvidia.com</email>
</author>
<published>2022-10-05T08:40:31Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2428787f16155aa03aa63d5c130e83809a7df5cf'/>
<id>urn:sha1:2428787f16155aa03aa63d5c130e83809a7df5cf</id>
<content type='text'>
Remove redundant codes for getting the vbus supply of usb3 ports because
we get and control the vbus supply by the companion usb2 ports

Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Signed-off-by: Haotien Hsu &lt;haotienh@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://lore.kernel.org/r/20221005084031.2154251-1-haotienh@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Tegra210 host mode VBUS control</title>
<updated>2021-06-03T12:52:45Z</updated>
<author>
<name>JC Kuo</name>
<email>jckuo@nvidia.com</email>
</author>
<published>2021-01-20T07:34:11Z</published>
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<id>urn:sha1:0baabcbedd9ef2381636a36f669187a46380de19</id>
<content type='text'>
To support XUSB host controller ELPG, this commit moves VBUS control
.phy_power_on()/.phy_power_off() to .phy_init()/.phy_exit().
When XUSB host controller enters ELPG, host driver invokes
.phy_power_off(), VBUS should remain ON so that USB devices will not
disconnect. VBUS can be turned OFF when host driver invokes
.phy_exit() which indicates disabling a USB port.

Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Add wake/sleepwalk for Tegra210</title>
<updated>2021-06-03T12:52:40Z</updated>
<author>
<name>JC Kuo</name>
<email>jckuo@nvidia.com</email>
</author>
<published>2021-01-20T07:34:10Z</published>
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<id>urn:sha1:2d102148727337005ac283a4190c6e56f973e915</id>
<content type='text'>
This commit implements Tegra210 XUSB PADCTL wake and sleepwalk
routines. Sleepwalk logic is in PMC (always-on) hardware block.
PMC driver provides managed access to the sleepwalk registers
via regmap framework.

Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Add Tegra210 lane_iddq operation</title>
<updated>2021-06-03T12:49:33Z</updated>
<author>
<name>JC Kuo</name>
<email>jckuo@nvidia.com</email>
</author>
<published>2021-01-20T07:34:05Z</published>
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<id>urn:sha1:c339605cb0f6d33c9dc8ca73033c665573149f29</id>
<content type='text'>
As per Tegra210 TRM, before changing lane assignments, driver should
keep lanes in IDDQ and sleep state; after changing lane assignments,
driver should bring lanes out of IDDQ.
This commit implements the required operations.

Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Rearrange UPHY init on Tegra210</title>
<updated>2021-06-03T12:49:33Z</updated>
<author>
<name>JC Kuo</name>
<email>jckuo@nvidia.com</email>
</author>
<published>2021-01-20T07:34:04Z</published>
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<id>urn:sha1:2352fdb0d35e030089bf473b6e21b3f08895b33b</id>
<content type='text'>
This commit is a preparation for enabling XUSB SC7 support.
It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence,
for the following reasons:

1. PLLE hardware power sequencer has to be enabled only after both
   PEX UPHY PLL and SATA UPHY PLL are initialized.
   tegra210_uphy_init() -&gt; tegra210_pex_uphy_enable()
                        -&gt; tegra210_sata_uphy_enable()
                        -&gt; tegra210_plle_hw_sequence_start()
                        -&gt; tegra210_aux_mux_lp0_clamp_disable()

2. At cold boot and SC7 exit, the following bits must be cleared after
   PEX/SATA lanes are out of IDDQ (IDDQ_DISABLE=1).
   a. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN,
   b. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY
   c. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN

   tegra210_pex_uphy_enable() and tegra210_sata_uphy_enable() are in
   charge of bringing lanes out of IDDQ, and then AUX_MUX_LP0_* bits
   will be cleared by tegra210_aux_mux_lp0_clamp_disable().

3. Once UPHY PLL hardware power sequencer is enabled, do not assert
   reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.

Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Move usb3 port init for Tegra210</title>
<updated>2021-06-03T12:49:33Z</updated>
<author>
<name>JC Kuo</name>
<email>jckuo@nvidia.com</email>
</author>
<published>2021-01-20T07:34:03Z</published>
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<id>urn:sha1:23d5ec3f02866be6be3f47eab01771f1cf445a68</id>
<content type='text'>
The programming sequence in tegra210_usb3_port_enable() is required
for both cold boot and SC7 exit, and must be performed only after
PEX/SATA UPHY is initialized. Therefore, this commit moves the
programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy
.power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane
is assigned for XUSB super-speed.

Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: Don't use device-managed API to allocate ports</title>
<updated>2020-03-19T13:00:05Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-03-19T10:52:13Z</published>
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<id>urn:sha1:e78fdbad1e902f422a7a0452cce8378d2652f219</id>
<content type='text'>
The device-managed allocation API doesn't work well with the life-cycle
of device objects. Since ports have device objects allocated within, it
can lead to situations where these devices need to stay around until
after their parent pad controller has been unbound from its driver. The
device-managed memory allocated for the port objects will, however, get
freed when the pad controller unbinds from the driver. This can cause
use-after-free errors down the road.

Note that the device is deleted as part of the driver unbind operation,
so there isn't much that can be done with it after that point, but the
memory still needs to stay around to ensure none of the references are
invalidated.

One situation where this arises is when a VBUS supply is associated with
a USB 2 or 3 port. When that supply is released using regulator_put() an
SRCU call will queue the release of the device link connecting the port
and the regulator after a grace period. This means that the regulator is
going to keep on to the last reference of the port device even after the
pad controller driver was unbound (which is when the memory backing the
port device is freed).

Fix this by allocating port objects using non-device-managed memory. Add
release callbacks for these objects so that their memory gets freed when
the last reference goes away. This decouples the port devices' lifetime
from the "active" lifetime of the pad controller (i.e. the time during
which the pad controller driver owns the device).

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: Fix regulator leak</title>
<updated>2020-03-19T13:00:04Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-03-18T22:25:54Z</published>
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<id>urn:sha1:2f8da84def73e1dd89385146e1dbb2ae2c8e0a6a</id>
<content type='text'>
Devices are created for each port of the XUSB pad controller. Each USB 2
and USB 3 port can potentially have an associated VBUS power supply that
needs to be removed when the device is removed.

Since port devices never bind to a driver, the driver core will not get
to perform the cleanup of device-managed resources that usually happens
on driver unbind.

Now, the driver core will also perform device-managed resource cleanup
for driver-less devices when they are released. However, when a device
link is created between the regulator and the port device, as part of
regulator_get(), the regulator takes a reference to the port device and
prevents it from being released unless regulator_put() is called, which
will never happen.

Avoid this by using the non-device-managed API and manually releasing
the regulator reference when the port is unregistered.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Add set_mode support for USB 2 phy on Tegra210</title>
<updated>2020-03-19T12:59:46Z</updated>
<author>
<name>Nagarjuna Kristam</name>
<email>nkristam@nvidia.com</email>
</author>
<published>2020-02-10T08:11:32Z</published>
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<id>urn:sha1:de792a6da7f026a5aa047ee62a0fafb1e5d0e6ed</id>
<content type='text'>
Add support for set_mode on USB 2 phy. This allow XUSB host/device mode
drivers to configure the hardware to corresponding modes.

Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Add vbus override support on Tegra210</title>
<updated>2019-10-23T07:50:36Z</updated>
<author>
<name>Nagarjuna Kristam</name>
<email>nkristam@nvidia.com</email>
</author>
<published>2019-10-18T09:38:08Z</published>
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<id>urn:sha1:90767cdfea89c3ac7012035d66633b9ba839091a</id>
<content type='text'>
Tegra XUSB device control driver needs to control vbus override
during its operations, add API for the support.

Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
</feed>
