kernel/drivers/phy/qualcomm/phy-qcom-qmp.h, branch linux-6.9.y

phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets

2024-06-27T11:52:23Z

[ Upstream commit 163c1a356a847ab4767200fd4a45b3f8e4ddc900 ] Currently, none of the X1E80100 supported boards upstream have enabled DP. As for USB, the reason it is not broken when it's obvious that the offsets are wrong is because the only difference with respect to USB is the difference in register name. The V6 uses QPHY_V6_PCS_CDR_RESET_TIME while V6 N4 uses QPHY_V6_N4_PCS_RX_CONFIG. Now, in order for the DP to work, the DP serdes tables need to be added as they have different values for V6 N4 when compared to V6 ones, even though they use the same V6 offsets. While at it, switch swing and pre-emphasis tables to V6 as well. Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys") Co-developed-by: Kuogee Hsieh Signed-off-by: Kuogee Hsieh Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-3-be8a0b882117@linaro.org Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: qcom: qmp: move common bits definitions to common header

2024-01-30T17:05:38Z

Move bit definitions for the common headers to the common phy-qcom-qmp.h header. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-5-a463d0b57836@linaro.org Signed-off-by: Vinod Koul

phy: qcom: qmp: split DP PHY registers to separate headers

2024-01-30T17:05:38Z

Split the DP PHY register definitions to separate headers, removing them from the global one. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-4-a463d0b57836@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: qserdes-txrx: Add v7 register offsets

2023-12-21T17:07:39Z

The X1E80100 platform bumps the HW version of QMP phy to v7 for USB and PCIE. Add the new qserdes TX RX offsets in a dedicated header file. Reviewed-by: Dmitry Baryshkov Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-7-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets

2023-12-21T17:07:39Z

There is a variant of V6 offsets that are different, the QMP PHY N4, and it is found on the X1E80100 platform. Reviewed-by: Dmitry Baryshkov Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-6-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: qserdes-com: Add v7 register offsets

2023-12-21T17:07:39Z

The X1E80100 platform bumps the HW version of QMP phy to v7 for USB and PCIE g3x2. Add the new qserdes com offsets in a dedicated header file. Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-5-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: pcs: Add v7 register offsets

2023-12-21T17:07:39Z

The X1E80100 platform bumps the HW version of QMP phy to v7 for USB, and PCIe. Add the new PCS offsets in a dedicated header file. Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-3-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: move PCS MISC V4 registers to separate header

2023-09-21T13:53:58Z

Move PCS MISC V4 registers to the separate header. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20230824211952.1397699-6-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul

phy: qcom: qmp-combo: reuse register layouts for even more registers

2023-07-12T16:57:42Z

Instead of passing additional registers to qmp_combo_configure_dp_swing(), reuse qphy_reg_layout and add those registers to register layout maps. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20230621153317.1025914-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul

phy: qcom-qmp: Add v6 DP register offsets

2023-02-10T17:02:43Z

The new SM8550 SoC bumps up the HW version of QMP phy to v6. Add the new DP specific offsets in the generic qmp header file. Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20230208183421.2874423-6-abel.vesa@linaro.org Signed-off-by: Vinod Koul