kernel/drivers/perf/arm_cspmu, branch 0x221E-v0.0.1-v6.19

perf: arm_cspmu: fix error handling in arm_cspmu_impl_unregister()

2025-11-03T14:20:03Z

driver_find_device() calls get_device() to increment the reference count once a matching device is found. device_release_driver() releases the driver, but it does not decrease the reference count that was incremented by driver_find_device(). At the end of the loop, there is no put_device() to balance the reference count. To avoid reference count leakage, add put_device() to decrease the reference count. Found by code review. Cc: stable@vger.kernel.org Fixes: bfc653aa89cb ("perf: arm_cspmu: Separate Arm and vendor module") Signed-off-by: Ma Ke Signed-off-by: Will Deacon

perf/arm_cspmu: nvidia: Add pmevfiltr2 support

2025-11-03T13:35:07Z

Support NVIDIA PMU that utilizes the optional event filter2 register. Reviewed-by: Ilkka Koskinen Signed-off-by: Besar Wicaksono Signed-off-by: Will Deacon

perf/arm_cspmu: nvidia: Add revision id matching

2025-11-03T13:35:07Z

Distinguish NVIDIA devices by revision and variant bits in PMIIDR register in addition to product id. Reviewed-by: Ilkka Koskinen Signed-off-by: Besar Wicaksono Signed-off-by: Will Deacon

perf/arm_cspmu: Add pmpidr support

2025-11-03T13:35:07Z

The PMIIDR value is composed by the values in PMPIDR registers. We can use PMPIDR registers as alternative for device identification for systems that do not implement PMIIDR. Reviewed-by: Ilkka Koskinen Signed-off-by: Besar Wicaksono Signed-off-by: Will Deacon

perf/arm_cspmu: Add callback to reset filter config

2025-11-03T13:35:07Z

Implementer may need to reset a filter config when stopping a counter, thus adding a callback for this. Reviewed-by: Ilkka Koskinen Reviewed-by: Suzuki K Poulose Signed-off-by: Besar Wicaksono Signed-off-by: Will Deacon

perf/arm_cspmu: Fix missing io.h include

2025-03-17T14:53:03Z

Adding the writel() calls needs io.h, which apparently gets transiently included somewhere on arm64, but not elsewhere. Fixes: 6de0298a3925 ("perf/arm_cspmu: Generalise event filtering") Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202503150649.Dol8RBSh-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202503152245.cAG4FMfi-lkp@intel.com/ Signed-off-by: Robin Murphy Link: https://lore.kernel.org/r/657935ca177024ad08d5ec6f85e8faf75f82cf65.1742212833.git.robin.murphy@arm.com Signed-off-by: Will Deacon

perf/arm_cspmu: Add PMEVFILT2R support

2025-03-13T21:35:04Z

Architecturally we have two filters for each regular event counter, so add generic support for the second one too. Signed-off-by: Robin Murphy Reviewed-by: James Clark Reviewed-by: Ilkka Koskinen Link: https://lore.kernel.org/r/b11be3f23a72bc27088b115099c8fe865b70babc.1741190362.git.robin.murphy@arm.com Signed-off-by: Will Deacon

perf/arm_cspmu: Generalise event filtering

2025-03-13T21:35:04Z

The notion of a single u32 filter value for any event doesn't scale well when the potential architectural scope is already two 64-bit values, and implementations may add custom stuff on the side too. Rather than try to thread arbitrary filter data through the common path, let's just make the set_ev_filter op self-contained in terms of parsing and configuring any and all filtering for the given event - splitting out a distinct op for cycles events which inherently differ - and let implementations override the whole thing if they want to do something different. This already allows the Ampere code to stop looking a bit hacky. Signed-off-by: Robin Murphy Reviewed-by: James Clark Reviewed-by: Ilkka Koskinen Link: https://lore.kernel.org/r/c0cd4d4c12566dbf1b062ccd60241b3e0639f4cc.1741190362.git.robin.murphy@arm.com Signed-off-by: Will Deacon

perf/arm_cspmu: Move register definitons to header

2025-03-13T21:35:04Z

Implementations may occasionally want to refer to register offsets, so for the sake of consistency move all of the register definitions to join the PMIIDR fields in the private header where they can be shared. As an example nicety, we can then define Ampere's imp-def filters in terms of the architectural PMIMPDEF range rather than open-coded offsets. Signed-off-by: Robin Murphy Reviewed-by: James Clark Reviewed-by: Ilkka Koskinen Link: https://lore.kernel.org/r/5a3c796560665b51cb63fec0d473afd8f8d0a836.1741190362.git.robin.murphy@arm.com Signed-off-by: Will Deacon

perf: arm_cspmu: nvidia: monitor all ports by default

2024-12-09T15:07:49Z

Some NVIDIA PMUs like the NVLINK-C2C, CNVLINK, and PCIE PMU provide port filtering. If the port filter is set to zero, the counter of these PMUs will not capture any event. To avoid meaningless experiment, the driver sets the port filter value to a default non-zero value. Signed-off-by: Besar Wicaksono Link: https://lore.kernel.org/r/20241031142118.1865965-5-bwicaksono@nvidia.com Signed-off-by: Will Deacon